Flip chip package capable of measuring bond line thickness...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Insulating material

Reexamination Certificate

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C257S706000

Reexamination Certificate

active

07015577

ABSTRACT:
A flip chip package includes a substrate, a flip chip, a thermal interface material and a heat sink. The flip chip is mounted on the substrate. The thermal interface material is applied on the back surface of the flip chip. The back surface of the flip chip includes a region uncovered by the thermal interface material. The opening exposes the uncover region of the back surface of the flip chip for measuring the height of the back surface. Also the opening has an inner sidewall above the back surface for fillet bonding of the thermal interface material. Therefore the bond line thickness (BLT) of the thermal interface material can be measured and calculated.

REFERENCES:
patent: 5835355 (1998-11-01), Dordi
patent: 6278182 (2001-08-01), Liu et al.
patent: 6433420 (2002-08-01), Yang et al.
patent: 6654248 (2003-11-01), Fishley et al.
patent: 6882041 (2005-04-01), Cheah et al.
patent: 6891259 (2005-05-01), Im et al.
patent: 2003/0183909 (2003-10-01), Chiu
patent: 508778 (2002-11-01), None

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