Chemistry: electrical and wave energy – Apparatus – Electrolytic
Reexamination Certificate
2008-04-08
2010-10-26
Lindsay, Jr., Walter L (Department: 2812)
Chemistry: electrical and wave energy
Apparatus
Electrolytic
C438S108000, C257SE23067, C222S590000
Reexamination Certificate
active
07820021
ABSTRACT:
A flip chip mounting method which is applicable to the flip chip mounting of a next-generation LSI and high in productivity and reliability as well as a method for connecting substrates are provided. A circuit board10having a plurality of connecting terminals11and a semiconductor chip20having a plurality of electrode terminals21are disposed in mutually facing relation and a resin13containing conductive particles12and a gas bubble generating agent is supplied into the space therebetween. In this state, the resin13is heated to generate gas bubbles30from the gas bubble generating agent contained in the resin13. The resin13is pushed toward the outside of the generated gas bubbles30by the growth thereof. The resin13pushed to the outside is self-assembled in the form of columns between the respective terminals of the circuit board10and the semiconductor chip20. In this state, by pressing the semiconductor chip20against the circuit board10, the conductive particles12contained in the resin13self-assembled between the facing terminals are brought into contact with each other to provide electrical connection between the terminals.
REFERENCES:
patent: 5672260 (1997-09-01), Carey et al.
patent: 5904156 (1999-05-01), Advocate et al.
patent: 6020059 (2000-02-01), Yamada et al.
patent: 6213356 (2001-04-01), Nakasu et al.
patent: 7524748 (2009-04-01), Fujimoto et al.
patent: 7638883 (2009-12-01), Karashima et al.
patent: 2007/0152016 (2007-07-01), Choe et al.
patent: 2009/0203170 (2009-08-01), Nakatani et al.
patent: 01-157796 (1989-06-01), None
patent: 06-125169 (1994-05-01), None
patent: 11-186334 (1999-07-01), None
patent: 2000-094179 (2000-04-01), None
patent: 2000-332055 (2000-11-01), None
patent: 2002-026070 (2002-01-01), None
patent: 2002-329745 (2002-11-01), None
patent: 2004-260131 (2004-09-01), None
Rito, Masahiro et al., “Assembly Process by Electrically Conductive Adhesive Using Low Melting Point Fillers,” 9th Symposium on “Microjoining and Assembly Technology in Electronics,” Feb. 6-7, 2003, Yokohama.
Yasuda, Masahiro et al., “Self-Organized Joining Assembly Process by Electrically Conductive Adhesive Using Low Melting Point Fillers,” 10th Symposium on “Microjoining and Assembly Technology in Electronics,” Feb. 5-6, 2004, Yokohama.
Yasuda, Kiyokazu et al., “Self-Organized Packaging using Polymer Containing Low-Melting-Point-Metal Filler-Process Simulation of Viscous Multi Phase Flow Fluid,” 11th Symposium on “Microjoining and Assembly Technology in Electronics,” Feb. 3-4, 2005, Yokohama.
Yamada, Takayuki et al., “Self-Organized Packaging by Polymer Containing Low Melting Point Metal-Experimental Verification of Process Rule Factors of Self-organization,” 11th Symposium on “Microjoining and Assembly Technology in Electronics,” Feb. 3-4, 2005, Yokohama.
Karashima Seiji
Kitae Takashi
Nakatani Seiichi
Lindsay, Jr. Walter L
McDermott Will & Emery LLP
Panasonic Corporation
LandOfFree
Flip chip mounting method and method for connecting substrates does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Flip chip mounting method and method for connecting substrates, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Flip chip mounting method and method for connecting substrates will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4220304