Flip chip molded/exposed die process and package structure

Details Flip chip molded/exposed die process and package structure Flip chip molded/exposed die process and package structure

2006-07-25

2006-07-25

Owens, Douglas W. (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Insulating material

C257S675000

Reexamination Certificate

active

07081668

ABSTRACT:
An Integrated Circuit package structure includes an Integrated Circuit device having a electrical contact points to the device in the bottom surface. A heatsink has a flat bottom surface extending past the device by a first distance and contacting the top surface of the device. A substrate has a flat upper surface extending past the device by the first distance and having points of electrical contact to the device and a lower surface having points of electrical contact for further interconnect of the substrate to surrounding circuitry or components with the upper and lower surfaces extending beyond the bottom surface of the device. A molding compound is between the flat bottom surface of the heatsink and the flat upper surface of the substrate to fill only the first distance and is among the points of electrical contact to the device.

REFERENCES:
patent: 5883430 (1999-03-01), Johnson
patent: 6720650 (2004-04-01), Miyazaki

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