Flip chip die

Details Flip chip die Flip chip die

2002-04-03

2003-07-01

Loke, Steven (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Solder wettable contact, lead, or bond

C257S778000, C257S780000, C257S738000

Reexamination Certificate

active

06586844

ABSTRACT:

CROSS-REFERENCE TO RELATED APPLICATION
This application claims the priority benefit of Taiwan application serial no. 91101433, filed Jan. 29, 2002.
SCENARIO OF THE INVENTION
1. Field of the Invention
The present invention relates in general to a flip chip die, and more particularly, to a flip chip die with different contact area for different bonding pad and under ball metallurgy pairs.
2. Description of the Related Art
In the current information explosion, electronic products are broadly applied in daily life. Products assembled by integrated circuit devices are seen in all kinds of activities. As electronic techniques are continuously improved, the functions thereof get more and more complicated, and products get updated all the time. Electronic products strive to be light, thin, short and small, consequently, high-density semiconductor package techniques such as flip chip (F/C) and ball grid array (BGA) have been developed
The flip chip technique directly mounts a flipped die on a substrate or a printed circuit board (PCB) via bumps formed on a pad on the die. Compared to the wire bonding and tape automatic bonding (TAB) package techniques, the flip chip package provides shorter signal transmission path, so that better electric characteristics are obtained. In addition, the flip chip technique can also design a bare chip back to enhance heat dissipation during operation. Because of the above features, the flip chip package technique has been widely applied in the semiconductor package industry.
Referring to
FIG. 1
, a cross sectional view of a conventional flip chip die is shown. The flip chip die
100
comprises a die
102
and multiple bumps
114
(only two of them are illustrated). A passivation layer
106
and multiple bump pads
110
(similarly, only two of them are shown) are formed on an active surface
104
of the die
102
. Openings
108
in the passivation layer
106
expose the bump pads
110
. In addition, to improve the adhesion between the bumps
114
and the bump pads
110
, under ball metallurgies (UBM)
112
are formed on the bump pads
110
as a joint medium between the bumps
114
and the bump pads
110
. The flip chip die
100
is then mounted to external substrate or printed circuit board via the bumps
114
.
Further referring to
FIG. 1
, according to specific functionalities, the bump pads
110
can be assorted into signal pads and power/ground pads, while the bumps
114
can be assorted into signal bumps and power/ground bumps. The contact area for each of the bump pad
110
and the under ball metallurgy
112
pair is identical. Therefore, the current flowing from each bump pad
110
to each under ball metallurgy
112
is the same. To obtain the required amount of power/ground current of the die
102
, the number of the bump pads
110
, especially the power/ground bump pads, has to be increased.
SUMMARY OF THE INVENTION
The invention provides a flip chip die that allows a larger current flowing from the bump pads to the under ball metallurgies, so that the number of power/ground bump pads of the die can be reduced. A better electric performance of the die results.
The flip chip die comprises a die, which further includes an active surface, a passivation layer, at least one first bump pad and at least one second bump pad. The passivation layer, the first and second bump pads are formed on the active surface. The passivation layer exposes the first and the second bump pads. The flip chip die further comprises at least one first under ball metallurgy formed on the first bump pad, and at least one second under ball metallurgy formed on the second bump pad. The contact area between the second under ball metallurgy and the second bump pad is larger than that between the first under ball metallurgy and the first bump pad. At least one first bump and one second bump are formed on the first and the second under ball metallurgies, respectively.
Both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed.


REFERENCES:
patent: 5977632 (1999-11-01), Beddingfield
patent: 6118180 (2000-09-01), Loo et al.
patent: 6326699 (2001-12-01), Shimizu et al.
patent: 6348401 (2002-02-01), Chen et al.
patent: 6415974 (2002-07-01), Jao
patent: 6426562 (2002-07-01), Farnworth
patent: 6433427 (2002-08-01), Wu et al.

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