Flip-chip assembly with improved interconnect

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...

Reexamination Certificate

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C438S612000, C438S613000, C438S614000, C438S107000, C257S778000, C257S781000, C257S780000, C257S786000, C257SE21511

Reexamination Certificate

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07732253

ABSTRACT:
The present invention provides a unique way of connecting a flip-chip die to a substrate. Initially, metallic posts are formed on the flip-chip die and solder bumps are placed on the substrate where the metallic post will ultimately connect to the substrate. The tip layer of flash gold, tin, or other wettable electroplated material is applied to the tips of the metallic posts to prevent oxidation and enhance wettability. The sides of the metallic posts are allowed to oxidize to reduce wettability. To attach the flip-chip die to the substrate, the flip-chip die is initially positioned over the substrate, such that the metallic posts align with and come into contact with the solder bumps. Once the flip-chip die is in place over the substrate, the substrate and the flip-chip are heated to cause the solder bumps to reflow and bond to the tip layers of the metallic posts.

REFERENCES:
patent: 3881799 (1975-05-01), Elliott et al.
patent: 3993515 (1976-11-01), Reichert
patent: 6578754 (2003-06-01), Tung
patent: 6592019 (2003-07-01), Tung
patent: 6681982 (2004-01-01), Tung
patent: 2004/0084206 (2004-05-01), Tung
patent: 2006/0049524 (2006-03-01), Lin et al.
patent: 2006/0252248 (2006-11-01), Hu

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