Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Reexamination Certificate
2000-07-19
2002-11-05
Nguyen, Tuan H. (Department: 2813)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
C257S724000, C257S777000
Reexamination Certificate
active
06475830
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention is directed to Multi-Chip Modules (MCMs) incorporating one or more ASICs (Application Specific Integrated Circuits), CPUs (Central Processing Units), DSPs (Digital Signal Processors) or other high value devices as well as one or more supporting memory devices.
2. Background Art
When attaching chips to a substrate a number of options are available. A common approach is to “package” the chip, i.e., to provide it with an intermediate substrate and connect conductive pins of the chips to conductive attachment points of the package, which can then be attached to a motherboard or similar substrate.
One type of chip package is known as a wirebond BGA package. In a wirebond BGA package a chip is attached via wirebond to an intermediate substrate. The intermediate substrate is attached, in turn, to a motherboard using bull grid array technology. Another type of chip package is known as flip chip BGA (BGA) or fine pitch flip chip BGA (FPBGA). Fine pitch BGA is defined as a pitch (center to center of the solder balls) less than 1 mm.). In this type of package the bare chip is provided with solder balls at its conductive pins, flipped over, and soldered directly via these solder balls to a land grid array of conductive pads on an intermediate substrate. A heat activated epoxy underfill is normally injected between the bare chip and the substrate to relieve stress. The intermediate substrate is then attached using BGA technology to a motherboard or another intermediate substrate.
Another type of chip package is known as leaded package. In this type of package leads at the periphery of the package can be soldered directly to electrical contacts of an intermediate substrate or directly to a motherboard. Leaded packages offer less density of electrical interconnections than the array type packages discussed above. Finally, chip scale packages or CSPs are available which have approximately the same areal size as bare die parts but also have the handling and testability characteristics of packaged devices. These CSPs are similar to flip chip BGA and FPBGA packages in that they have intermediate substrates, usually of a plastic film such as a polyimide which, in turn, support BGA or FPBGA used to attach the CSP to another substrate such as a motherboard.
In the past many manufacturers have attempted to place multiple chips on one module which can then, in turn, be attached to a circuit board. This approach is known as a multi-chip module or MCM. In one embodiment this is done by directly attaching the chips to a substrate and then attaching the substrate to a motherboard such as a printed circuit board PCB. A common application is to attach one or more or a combination of ASICs, CPUs, DSPs or other high value semiconductor integrated circuit devices along with one or more supporting memory chips to a substrate.
In flip chip direct attach technology as practiced today and illustrated in
FIGS. 1A
,
1
B and
1
C, a chip
10
is provided with small solder balls
12
on one surface
14
. The chip is “flipped” so that surface
14
faces the mounting surface
16
of PCB
18
. On mounting surface
16
of PCB
18
is located a land grid array
20
of pads
22
which mate with solder balls
12
. The solder balls are heated so that they reflow forming an electrical and physical connection between chip
10
and PCB
18
as shown in FIG.
1
B. Finally a filler material
24
(usually a heat curable epoxy) is injected between chip
10
and PCB
18
so that the relative stresses caused by different coefficients of thermal expansion (CTEs) in the chip and the PCB are relieved, avoiding stress failure and fatigue in the solder connections formed by the reflowed solder balls
12
. As shown in
FIG. 1B
, optionally a stiffener ring
19
capped with a heat slug
21
and thermally coupled to chip
10
with thermal grease (not shown) may be used to improve heat dissipation from the chip
10
.
The main drawback to using direct attach technology with MCMs including memory chips is the lack of reworkability of the memory chips, which tend to fail the most often. If one of the memory chips fails during testing then the entire module, including the costly ASICs, CPUs, DSPs or other high value devices, must be scrapped since the epoxy filler material cannot easily be removed due to the epoxy underfill. It would, therefore, be desirable to provide a MCM where the high value device is attached via direct attach technology such as flip chip while the memory chips are attached using a reworkable technology so that if the module fails under test due to a memory chip problem, the memory chips can be reworked (i.e., removed and replaced) without scrapping the entire module.
SUMMARY OF THE INVENTION
A multi-chip, module (MCM) having one or more high value chips such as ASICs, CPUs, DSPs or the like attached to the MCM substrate via a direct attach technology (such as flip chip) and one or more memory chips attached to the MCM substrate via a reworkable technology such as connector and receptacle-based package, wirebond package, chip scale package (CSP), leaded package, ball grid array package, or fine pitch ball grid array package is disclosed. The MCM substrate may, in turn, be attached to a motherboard via solder balls (ball grid array), leads and/or connector interconnect technologies (such as compression sockets).
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Berezny Nema
Cisco Technology Inc.
Nguyen Tuan H.
Ritchie David B.
Thelen Reid & Priest LLP
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