Flexible single chip digital processor architecture

Details Flexible single chip digital processor architecture Flexible single chip digital processor architecture

1995-03-31

1998-09-01

Pan, Daniel H.

Boots, shoes, and leggings

395892, 395894, 364DIG1, 364DIG2, G06F 944, G06F 1338

Patent

active

058023828

ABSTRACT:
An application-specific single chip digital processor having flexible design expansion capability with minimal impact on the performance of a processor core. The processor core has an ALU and a register file (accumulators). The output of the ALU is connected to a multiplexer whose output is connected to the input of the register file. The output of the register file connects to one input of the ALU. A function unit, separate from the core, has an input connected to the output of the register file and an output connected to another input to the multiplexer. The core operates with a predefined instruction set. The function unit, which may be redesigned depending on the application, operates with a reserved (uncommitted) instruction set under control of the core.

REFERENCES:
patent: 3579201 (1971-05-01), Langley
patent: 3986170 (1976-10-01), Valassis et al.
patent: 4093993 (1978-06-01), Sato
patent: 4096566 (1978-06-01), Borie et al.
patent: 4224676 (1980-09-01), Appelt
patent: 4393468 (1983-07-01), New
patent: 4442498 (1984-04-01), Rosen
patent: 4467444 (1984-08-01), Harmon, Jr. et al.
patent: 4641247 (1987-02-01), Laugesen et al.
patent: 4718057 (1988-01-01), Venkitakrishnan
patent: 4760517 (1988-07-01), Miller et al.
patent: 4811269 (1989-03-01), Hirose et al.
patent: 4901267 (1990-02-01), Birman et al.
patent: 4935867 (1990-06-01), Wang et al.
patent: 4947357 (1990-08-01), Stewart et al.
patent: 5056015 (1991-10-01), Baldwin et al.
patent: 5072418 (1991-12-01), Boutand et al.
patent: 5123108 (1992-06-01), Olson et al.
patent: 5134487 (1992-07-01), Taguchi et al.
"Multiprocessor Configurations for the 8086", The 8086 Book, Russell Rector, George Alexy, Osborne/McGraw-Hill, Berkeley, California Copyright 1980 pp. 10-2 and 10-3.
"AT&T UNIX Microsystem", WE 32106 Math Acceleration Unit Information Manual, Select Code 307-734, Nov. 1986 pp. 1-1 through 1-4, 2-24 through 2-27, 4-1 through 4-4, 4-8 through 4-10, 4-14, 4-19, and 4-22.
"TMS320C50 DSP", Texas Instruments Preview Bulletin.
"DSP 16 Architecture", AT&T WE DSP16 Digital Signal Processor Information Manual, pp. 2-1 through 2-16.
4 943 915 (N. C. Wilhelm et al.).
Compson Spring '89 Digest of Papers 3 Mar. 1989, San Francisco, CA, US pp. 13-17 G. Hinton, '80960-Next Generation.
I.E.E.E. Micro. vol. 9, No. 2, Apr. 1989, Los Alamitos, CA US pp. 26-38--C. Melear, The Design of the 88000 RISC Family.

Affiliated with

Also associated with

Rating

Flexible single chip digital processor architecture does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Flexible single chip digital processor architecture, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Flexible single chip digital processor architecture will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-282627