Flexible IC layout method

Details Flexible IC layout method Flexible IC layout method

1995-06-12

1998-04-21

Dutton, Brian

Semiconductor device manufacturing: process

Making device array and selectively interconnecting

Rendering selected devices operable or inoperable

438599, H01L 2182, H01L 2144

Patent

active

057417300

ABSTRACT:
The present invention is related to a flexible IC layout method utilized for an IC having a plurality of logic gates in a first direction connected with a plurality of logic gates in a second direction wherein each of the logic gates has at least one polysilicon region and each of the logic gates in the first direction has an output serving as an input of a corresponding one of the logic gates in the second direction, which includes a step of forming input terminals for the logic gates by ion implantation. The present invention is flexible because the addition or deduction of the number of the input terminals according to the present invention can be achieved by ion implantation.

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