Flexible circuit with coverplate layer and overlapping...

Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement

Reexamination Certificate

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Details

C174S254000, C174S260000, C361S749000, C361S750000, C361S751000, C361S760000, C361S777000

Reexamination Certificate

active

06320137

ABSTRACT:

FIELD OF THE INVENTION
The invention disclosed herein relates generally to circuit substrates and electronic packages. More specifically, the invention relates to flexible circuit substrates including, one or more traces and an overlapping protective layer for protecting an interface between a base layer and coverplate layer of each trace.
BACKGROUND OF THE INVENTION
Flexible circuits generally include a plurality of conductive traces that are supported on a base substrate such as a layer of flexible dielectric material. A key aspect of flexible circuits is that they offer attributes such as fine pitch traces, complex circuit designs and flexibility. Electronic packages, medical devices, hard disk drive suspensions and ink jet printer pens are common applications for flexible circuits. U.S. Pat. Nos. 4,987,100; 5,227,008; 5,334,487; 5,557,844 and 5,680,701 disclose processes for fabricating printed circuits having a flexible polymeric base substrate such as polyimide or polyester.
In some applications, flexible circuits may be exposed to an aggressive environment that promotes corrosion of the conductive traces. The conductive traces and the interface between the conductive traces and the base substrate are two areas susceptible to being adversely affected by environmental conditions such as exposure to corrosive fluids and moisture. To minimize the potential for corrosion, the conductive traces may include a corrosion resistant coverplate layer formed on a core or base layer of the conductive traces. It is common for the base layer to be made of a material susceptible to corrosion such as copper and for the coverplate layer to be made of a material resistant to corrosion such as gold, tin or palladium.
Gold is a preferred material for the coverplate layer in many applications. A coverplate layer made of gold exhibits excellent electrical conductivity, corrosion resistance and bonding performance. However, a gold coverplate layer is an expensive component of a flexible circuit. The cost associated with the coverplate layer can become excessive when the entire surface or nearly the entire surface of the base layer of each trace is plated with a coverplate layer made of a material such as gold, tin or palladium.
Some flexible circuits have a coverplate layer on only a portion of each trace to reduce the quantity, and therefore the cost, of the coverplate material. In most applications, the coverplated portions of the traces are functional areas used for bonding or testing of the circuit, or areas that need superior environmental protection in the end use environment. The portion of each trace that is not coverplated is often covered with a protective layer, such as a photoimageable or screen printed covercoat or adhesive film, to reduce the potential for corrosion of the base layer of the traces.
It is known in the art to use a selectively patterned protective layer as a photomask for the coverplate material. Subsequent to forming the patterned protective layer, the coverplate layer is formed on the base layer of the traces using a method such as electroplating or electroless plating. In both methods, the coverplate layer is formed on the base layer of the conductive traces, but not on the protective layer. After the coverplate layer is formed, the protective layer is left in place. This technique is more cost effective than applying a corrosion resistant coverplate layer to the entire circuit. However, this circuit fabrication technique results in the presence of an abutting interface between the protective layer and the coverplate layer. The inherent flexibility of flexible circuits, shrinkage of the protective layer and physical changes associated with thermal cycling of the protective layer contribute to reduced reliability and increased susceptibility to corrosion at the abutting interface.
Therefore, what is needed is a circuit construction and manufacturing process that reduces the potential for corrosion at the interface between the base layer and coverplate layer of a trace without requiring the entire base layer to be plated with a corrosion resistant coverplate layer.
SUMMARY OF THE INVENTION
It has been discovered that corrosion resistant flexible circuits coverplated with a material such as gold can be manufactured using a process that permits a cost-effective, reliable and versatile construction to be achieved. In one embodiment of the present invention, accordingly, a printed circuit includes a dielectric substrate and a conductive trace attached to a surface of the dielectric substrate. The trace includes a base layer and a coverplate layer on a portion of the base layer. The coverplate layer defines a coverplate edge on the base layer. A protective layer is formed on a portion of the coverplate layer. The protective layer extends beyond the coverplate edge onto at least a portion of the base layer of the trace.
Circuits according to the present invention exhibit a reduced potential for corrosion at the interface between the base layer and coverplate layer of a trace. In a process according to the present invention, circuits can be fabricated using reduced quantities of coverplate material to produce a circuit without an abutting interface between the protective layer and the coverplate layer. Furthermore, the process permits all of the inherent benefits and advantages of conventional flexible circuit constructions to be achieved.
The constructions described herein include a unique “overlap” of the protective layer (adhesive laminate, covercoat, etc.) over the coverplate edge. The overlap portion of the protective layer improves the reliability of the final product by encapsulating the base layer, particularly at the edge of the coverplate layer, protecting it from adverse environmental conditions. This feature is particularly important for products that rely on their flexibility and ability of undergo repeated thermal cycling. Prior constructions exhibit an abutting interface between the protective layer and the coverplate edge. In these prior constructions, the abutting interface is readily compromised due to flexing, thermal cycling of the circuit and shrinkage of the protective layer after plating. These conditions provide a preferential site at the abutting interface for corrosion of the base layer of the trace.
Preferred materials for the dielectric substrate include polymeric films made of materials such as polyimide and polyester. Copper is a preferred material for the conductive trace and gold is a preferred material for the coverplate layer.
Circuits according to the present invention may be constructed in a number of configurations to prevent corrosion of the base layer of the trace. In a circuit configuration, the protective layer covers all of the portions of the base layer not having a coverplate layer thereon. In another circuit configuration, the protective layer is formed on only a portion of the base layer of the trace. In yet another circuit configuration, the protective layer is formed on the base layer of the trace and on the dielectric substrate.
Another embodiment of the present invention provides an electronic package including a flexible dielectric substrate and a plurality of conductive traces attached to a surface of the dielectric substrate. Each one of the traces includes a base layer, a coverplate layer on a portion of the base layer, a supported portion mounted on the dielectric substrate and a first interconnect portion extending from an edge of the dielectric substrate. The coverplate layer defines a coverplate edge on the base layer. A protective layer is formed on a portion of the coverplate layer and on at least a portion of the base layer of each trace The protective layer extends beyond the coverplate edge onto at least a portion of the base layer. An aperture extends through the dielectric substrate adjacent to each trace. A second interconnect portion of each trace is exposed within the aperture. An interconnect member is mounted on the second interconnect portion of each trace. An electronic device is mounted adjacent to

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