Flexible CDMA combiner

Multiplex communications – Communication over free space – Combining or distributing information via code word channels...

Reexamination Certificate

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Details

C375S355000

Reexamination Certificate

active

06735189

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a combiner for combining digital data samples from a predetermined number of inputs to a predetermined number of outputs, for example from a predetermined number of channels, onto a predetermined number of carriers of a digital communication system.
In telecommunication systems, a large number of channels, e.g. user channels containing voice or data signals, may be transmitted together via the same transmission medium, for example, via the same radio frequency band. A multitude of access schemes for placing the data of the user channels on the transmission medium is known. One class of transmission schemes simultaneously transmits a plurality of different user channels, e.g. in a radio frequency band, in such a way that they overlap in the time domain as well as in the frequency domain. A well-known access scheme of this class is the CDMA (Code Division Multiple Access) scheme.
Although the invention is not limited to the CDMA scheme and may be used in any digital communication system where a number of digital data samples from a predetermined number of inputs (e.g. user channels or some sort of preadded channels) must be combined flexibly onto a predetermined number of outputs, (e.g. carriers), the invention in particular relates to a flexible CDMA combiner, where the digital data samples are represented by weighted chips generated in a base station of a CDMA radio communication system.
BACKGROUND OF THE INVENTION
FIG. 1
shows a typical block diagram of a conventional baseband CDMA transmitter in a CDMA base transceiver station BTS. Data on a plurality of user channels ch-
1
, ch-
2
, . . . ch-n are input to a channel encoder
1
. Apart from channel coding itself, the channel encoder
1
may perform a QPSK modulation, time-alignment of the user data etc. The channel encoder
1
outputs a possibly complex-valued output data symbol stream (ODSS) which is input to a spreader/power weighting unit
2
which receives spreading codes and power weights for the individual channels. Each user channel is spread with a specific spreading code and after spreading each channel is power weighted before all channels &phgr;
1
, &phgr;
2
, . . . &phgr;
n
are output to a combiner
3
where they are combined. Note that &phgr;
1
, &phgr;
2
, . . . &phgr;
n
may refer to the real and imaginary parts of complex-value channels. The output of the spreader/power weighting unit
2
are sets of weighted chips which are output at a chip rate CLK. That is, within each period t
0
-t
1
, t
1
-t
2
, . . . t
k−1
-t
k
a single weighted chip of each channel is output parallely. Each weighted chip contains a predetermined number of bits, i.e. each digital data sample has a predetermined bit width (hereinafter denoted as in bit) due to power weighting.
In a CDMA communication system a (geographical) area is divided into several regions which are called sectors. In each sector, at least one and possibly more carriers are used where each carrier represents a particular frequency band. Within each sector the carrier can have a different number of channels. In the following description, the term “sector-carrier” represents basically a combination of a particular sector with a particular carrier (frequency band). The task of the combiner
3
is to combine the data of all the channels, which must be transmitted in a specific sector and on a specific carrier. Thus, the combiner
3
is essentially an adder which adds up the discrete instantaneous values of all channels belonging to a given sector-carrier. As is indicated in
FIG. 1
there may be m sector-carriers sc-
1
, sc-
2
, . . . sc-m.
Typically, in a CDMA transmitter, the number of channels to be added for each such sector-carrier is fixed by the hardware implementation. Since a separate (but identical) combiner hardware is used for each sector-carrier, this results in an equal number of channels on each sector-carrier of a base transceiver station BTS. On the other hand, in contradiction to this fixed equal number of channels, the network operator of a CDMA system faces in practice a different load in each of the sector-carriers. Therefore, the network operator would like to configure a variable number of user channels for each sector-carrier. For example, a base transceiver station BTS on a highway requires a higher number of user channels in the sectors covering this highway, whereas other sectors (for example covering a rural or mountainous area) may only have to handle a few user channels. Furthermore, the load in the individual sectors might also change over time, e.g. during rush-hours, holiday seasons or trade fairs.
Thus, having a fixed number of channels per sector-carrier implies that the network operator has always to provide a high number of user channels for all sector-carriers no matter whether or not they are actually required in a particular point in time.
Thus, it is desirable to provide the network operator with a flexible combiner, which allows the network operator to tailor the number of available channels per sector-carrier according to the load conditions in the system. With the flexible combiner the network operator could buy a standard base transceiver station BTS having the capability to process a certain total number of channels, and could adapt the base transceiver station BTS to the actual distribution of channels over the sectors and carriers without wasting ressources. The flexible combiner could return benefits also to the supplier with less cost for adapting his equipment to the customer's needs.
Prior Art Solutions
When the number of channels to be combined onto a specific sector-carrier is fixed and does not change over time a combiner as shown in
FIG. 2-1
and denoted with reference numeral
3
-
1
can be used. In this combiner
3
-
1
the channels &phgr;
1
, &phgr;
2
, &phgr;
3
, &phgr;
4
are invariably combined onto the sector-carrier sc-
1
and the channels &phgr;
n-3
, &phgr;
n-2
, &phgr;
n-1
, &phgr;
n
are combined onto the sector-carrier sc-m. The channels are respectively added in pairs in the adders ADD
1
, and stored in intermediate flip-flops FF
1
whereafter the respective outputs are added by an adder ADD
2
and the output of the adder ADD
2
is stored in a further intermediate flip-flop FF
2
. This type of circuit must be provided for each of the m sector-carriers. For the example in
FIG. 2-1
, where 4 channels per sector-carrier are combined, n (total number of channels) is equal to m*4 (m: number of sector-carriers). The combiner
3
-
1
in
FIG. 2-1
has the disadvantage that the channels are invariably combined onto the sector-carriers and furthermore, the combiner
3
-
1
needs quite an extensive hardware, since the respective circuits need to be provided m-times.
FIG. 2-2
shows a combiner
3
-
2
which allows to reduce the hardware complexity. Such a combiner is described in EP 98 121 518.9 filed by the same applicant as the present application. Essentially, the combiner
3
-
2
in
FIG. 2-2
comprises m adders ADD
5
, m flip-flops FF
5
and m flip-flops FF
6
. The outputs of the flip-flops FF
5
are respectively coupled to the input of the adder ADD
5
which also receives the output of a respective multiplexer MUX which is also provided m-times. If in
FIG. 2-2
, similarly as in
FIG. 2-1
, again 4 channels (such as &phgr;
2
, &phgr;
3
, &phgr;
4
or &phgr;
n-3
, &phgr;
n-2
, &phgr;
n-1
, &phgr;
n
) are to be combined onto each sector-carrier, then the respective adder ADD
5
and the respective multiplexer MUX have to be operated at four times the chip rate CLK in order to add one weighted chip of each of the respective four channels in a single chip period 1/CLK. The limiting factor in
FIG. 2-2
is thus the maximum operating frequency of the adder.
The combiner
3
-
2
of
FIG. 2-2
provides more flexibility than the combiner
3
-
1
, since for combining e.g. 8 instead of 4 channels per sector-carrier, the adder ADD
5
could operate at twice the rate (i.e. 8*CLK) and the MUX could be provided with 8 instead of 4 inputs while in the c

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