Flattening method and flattening apparatus of a semiconductor de

Details Flattening method and flattening apparatus of a semiconductor de Flattening method and flattening apparatus of a semiconductor de

1995-04-13

1997-02-25

Kisliuk, Bruce M.

Abrading

Accessory

Dressing

451 41, B24B 2118

Patent

active

056054998

ABSTRACT:
A method for flattening an inter-layer insulating film of a semiconductor device of a multi-wiring is carried out with a chemical-mechanical polishing process by using an apparatus, which includes two-layer polishing cloth having an unwoven cloth and a hard foamed layer affixed on a support plate. In order to fluff on a surface of the hard foamed layer or recreate on the whole surface thereof, a tool is provided on the polishing cloth. A silicon wafer is held through a backing pad so that an insulating film of a semiconductor device formed on the wafer is polished by the polishing cloth by rotation of the support plate and the wafer, and at the same time the surface layer of the polishing cloth is fluffed by the tool provided with a polishing surface having the curvature as that of the backing pad. Therefore, a polishing rate can be kept stable, and uniformity of polishing quantity is improved.

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Speedfam CMP-V Planarization System, The Competitive Edge. 0.35, Micron Line Width Design Rule.

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