Flattening and machining method and apparatus

Abrading – Abrading process – With tool treating or forming

Reexamination Certificate

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C451S443000

Reexamination Certificate

active

06390895

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a method and an apparatus for polishing a semiconductor substrate and particularly, relates to a method and an apparatus for flattening/machining suitable for flattening/machining in the manufacturing process of the semiconductor integrated circuits.
BACKGROUND OF THE INVENTION
A manufacturing process for semiconductor integrated circuits includes many processes of treatments and among them, description will be given of an interconnection process, as an example of a process to which the present invention is applicable, with reference to
FIGS. 5A through 5F
.
FIG. 5A
shows a sectional view of a wafer on which interconnection of the first layer is formed. A dielectric film
16
is formed on a surface of a wafer substrate
15
at which a transistor section has been formed and an interconnection layer
17
made of aluminum or the like is provided on the dielectric film
16
.
Since a hole is formed in the dielectric film
16
in order to ensure contact with a transistor, a portion
17
′ of the interconnection layer
17
corresponding to the hole is more or less sunk downward. In an interconnection process for the second layer shown in
FIG. 5B
, a dielectric film
18
and a metal aluminum layer
19
are sequentially formed on the first layer and in addition to this, a photo-resist layer
20
for exposure is coated thereon to form an interconnection pattern of the aluminum layer.
Next, a circuit pattern, as shown in
FIG. 5C
, is exposed to be transferred onto the photo-resist
20
under exposure using a stepper
21
. In this situation, a recess and protrusion
22
of the surface of the photo-resist layer
20
cannot be simultaneously in an in-focus condition, leading to a significant obstacle against correct photolithography due to poor optical resolution.
In order to eliminate the above described inconvenience, a flattening process for a substrate surface described below is adopted. Following the process of
FIG. 5A
, the dielectric layer
18
, as shown in
FIG. 5D
, is formed and thereafter, polishing is applied on the dielectric layer
18
by the method described later such that the layer is flattened off down to the level indicated by a single dot & dash line
23
to attain a state of FIG.
5
E. After the flattening, the metal aluminum layer
19
and the photo-resist layer
20
are sequentially formed on the dielectric layer
18
and the photo-resist layer
20
is then exposed with the stepper
21
. In this situation, since a photo-resist surface is flat, there arises no problem due to poor optical resolution.
As a flattening process described above, there can be cited here, for example, U.S. Pat. No. 4,944,836 or Japanese laid open U.S. Pat. No. 59-136934 (Japanese patent publication No. 5-30052), in which a flattening/machining method using polishing is disclosed.
In
FIG. 6
, a diagram of a machining method generally called a chemical, mechanical polishing (CMP) method as a flattening/machining method is shown. In this
FIG. 6
, a polishing pad
25
is fixedly pasted on a platen
7
and the platen
7
is in rotation by a rotation driving means (a motor)
8
. The polishing pad
25
is produced, for example, by slicing foam urethane resin into thin sheets and such sheets are used selecting proper characteristics and fine structure in various ways according to a kind of an object to be machined and a level of surface roughness of finish. On the other hand, a wafer
5
to be machined is fast held on a wafer holder
4
with an elastic packing pad
24
interposed between them. The wafer
5
is pushed down onto a surface of the polishing pad
25
with a load through the wafer holder
4
in rotation and further, a polishing slurry
23
is fed onto the polishing pad
25
, so that protrusions of the dielectric film
18
on the surface of the wafer
5
is polished off to flatten.
In a case where a dielectric film, such as silicon dioxide and so on is polished, silica is generally used as the polishing slurry
23
. Silica is a suspension obtained by dispersing high-purity fine silica particles of a particle diameter of the order 30 to 150 nm in an aqueous alkaline solution of potassium hydroxide, ammonia or the like and characterized in that a flat, smooth surface with less-work damage can be attained using it.
Further, there is provided a wafer flattening/machining technique in addition to the above described, which uses a fixed abrasive platen made of cerium oxide or the like. While a basic construction of an apparatus is similar to that of a free abrasive grain polishing technique using the polishing pad
25
shown in
FIG. 6
, a fixed abrasive platen
6
is mounted on a rotating platen
7
as shown in
FIG. 7
instead of the polishing pad
25
.
With this apparatus, machining can be carried out by feeding just water with no abrasive as a polishing liquid
23
instead of silica or the like. It should be appreciated that a flattening/machining technique in which a fixed abrasive platen
6
is used in the course of a manufacturing process of a semiconductor device has been proposed by the inventors of the present invention, for example, in a PCT patent application (International Publication Number WO 97/10613).
The fixed abrasive platen
6
is composed of abrasive grains, resins and pores. In a case where flattening/machining are carried out using such a fixed abrasive platen
6
, there arises a need of a dressing process in which a surface of the fixed abrasive platen
6
is flattened with a diamond dresser, whereby active surfaces of fixed abrasive grains are exposed. If flattening/machining is carried out with no dressing process applied, local concentration of stress occurs in a surface of a wafer, resulting in adverse influences such as deterioration in uniformity across the surface of a wafer and occurrence of scratches thereon and so on.
In the case where flattening/machining is carried out using the fixed abrasive platen
6
as aforementioned in the above description of a prior art, there has been arisen a problem of instability in machining rate (fluctuations in machining amount per unit time). In order to avoid such inconveniences, dressing of the surface of the fixed abrasive platen
6
is performed prior to or during wafer machining, thereby flattening the surface thereof.
However, a performance of the fixed abrasive platen
6
though having been dressed is unstable soon after the start-up of the apparatus, thereby causing such phenomena that machining rates from wafer to wafer are varied and that uniformity across the surface of a wafer is reduced (non-uniform machining). In the prior art, in order to remove such instability, there have been inevitably required the following processes in which: the apparatus is left running with no operation done for a proper length of time after the start-up, that is, a so-called idling time is allowed for the apparatus, a dummy wafer is thereafter fed to confirm its performance and if the performance is confirmed acceptable, production gets started.
However, the requirement of the above processes results in serious problems causing increase in cost and reduction in throughput.
Consequently, it is an object of the present invention to provide a flattening/machining method using an improved fixed abrasive platen so that such a problem of the prior art technology is solved, being excellent in economics and increasing a throughput; and a flattening/machining apparatus, thereby enabling production of high reliability semiconductor devices with ease.
SUMMARY OF THE INVENTION
The inventors of the present invention have conducted experiments in various ways about a polishing method and a polishing apparatus, in which a porous fixed abrasive platen of this kind is used, in order to achieve the above described object, with the result of precious findings that in a process of wetting the fixed abrasive platen, a rapid increase in volume occurs through expansion of the fixed abrasive platen due to wetting in a given time directly after the start of wetting; a shape thereof alters so rap

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