Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings
Reexamination Certificate
2001-12-05
2002-12-10
Flynn, Nathan J. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Multiple housings
C257S712000, C257S797000, C257S723000, C257S727000, C257S785000
Reexamination Certificate
active
06492720
ABSTRACT:
BACKGROUND OF THE INVENTION AND RELATED ART STATEMENT
The present invention pertains generally to semiconductor power converters using flat-type semiconductor devices and, more particularly, relates to flat-type semiconductor stacks formed of alternately stacked flat-type semiconductor devices and heat-radiating elements.
Generally, a flat-type semiconductor stack used in a semiconductor power converter is made by alternately stacking layers of flat-type semiconductor devices, such as gate commutated turn-off thyristors (GCTs), and heat-radiating elements, such as heat sinks, for cooling the flat-type semiconductor devices, and pressurizing the layers in their stacking direction.
As a result of an increase in capacity in recent years, the flat-type semiconductor stacks tend to have larger outside dimensions and produce increased amounts of heat to be absorbed and dissipated, making it necessary to increase the physical size of their heat-radiating elements. Today, the flat-type semiconductor stacks are of greater importance to industrial applications. In this situation, there is a growing demand these days for power converters having a compact structure produced by alternately stacking multiple layers of flat-type semiconductor devices.
In a flat-type semiconductor stack produced by stacking multiple layers of large-sized flat-type semiconductor devices and heat-radiating elements, it is important to accurately match the center of each flat-type semiconductor device when assembling them or replacing any of the flat-type semiconductor devices.
Gate-integrated flat-type semiconductor devices featuring improved performance integrated with gate circuits have become available in recent years. This results in an increase in the weight of the flat-type semiconductor devices and makes it necessary to match their centers more accurately.
FIG. 7
is a side view of a conventional flat-type semiconductor stack showing in particular how its individual elements are stacked. As can be seen from
FIG. 7
, specific numbers of flat-type semiconductor devices
1
and heat-radiating elements
2
for cooling the flat-type semiconductor devices
1
are alternately stacked, and these devices
1
and elements
2
are pressurized from both ends in their stacking direction.
FIG. 8
is a perspective view showing how the flat-type semiconductor devices
1
and the heat-radiating elements
2
of the flat-type semiconductor stack are aligned.
Referring to
FIG. 8
, a positioning hole
3
a
is formed at the center of each contact surface of the flat-type semiconductor device
1
, whereas a projecting center pin
3
is fixed to each contact surface of the heat-radiating elements
2
at a position corresponding to the positioning hole
3
a.
When stacking the flat-type semiconductor devices
1
and the heat-radiating elements
2
, they are accurately aligned as each center pin
3
is inserted into the corresponding positioning hole
3
a.
When it becomes necessary to replace one flat-type semiconductor device
1
of this flat-type semiconductor stack upon completion of its assembly, the adjacent heat-radiating elements
2
are separated from the flat-type semiconductor device
1
, creating gaps wider than the height of the center pins
3
as shown in FIG.
9
. Then, the flat-type semiconductor device
1
is lifted and pulled out in a manner that the center pins
3
would not damage the flat-type semiconductor device
1
. When fitting a new flat-type semiconductor device
1
, it is lifted and positioned such that the center pins
3
of the adjacent heat-radiating elements
2
exactly align with the positioning holes
3
a
in the flat-type semiconductor device
1
with utmost care not to damage the new flat-type semiconductor device
1
by the center pins
3
. Then, the center pins
3
are fitted into the positioning holes
3
a
until the gaps between the flat-type semiconductor device
1
and the heat-radiating elements
2
are eliminated.
FIG. 10
is an exploded perspective view of a flat-type semiconductor stack including a gate-integrated flat-type semiconductor device
6
formed by mounting a flat-type semiconductor device
1
and a gate circuit
5
on a single substrate
4
, wherein the gate-integrated flat-type semiconductor device
6
and heat-radiating elements
2
are aligned using the aforementioned conventional positioning method shown in FIG.
8
. In this example of the prior art, the gate-integrated flat-type semiconductor device
6
and the upper heat-radiating element
2
are aligned by inserting a center pin
3
projectingly fixed to a bottom contact surface of the upper heat-radiating element
2
into a positioning hole
3
a
formed in a top contact surface of the gate-integrated flat-type semiconductor device
6
in the same manner as shown in FIG.
8
.
In this flat-type semiconductor stack, another positioning hole
3
a
is formed in a bottom surface of the substrate
4
(bottom side of the substrate
4
as illustrated in
FIG. 10
) that is joined to the lower heat-radiating element
2
.
Since the flat-type semiconductor devices
1
and the heat-radiating elements
2
are aligned in the aforementioned manner in the conventional flat-type semiconductor stacks, it is necessary to create gaps wider than the height of the center pins
3
between one flat-type semiconductor device
1
to be replaced and its adjacent heat-radiating elements
2
. It is therefore necessary to provide sufficient space allowance between the flat-type semiconductor device
1
and the adjacent heat-radiating elements
2
that enables the heat-radiating elements
2
to be moved in their stacking direction for making gaps wider than the height of the center pins
3
. This tended to make the construction of the flat-type semiconductor stacks complicated.
Also in the conventional flat-type semiconductor stacks, it is necessary to lift and pull out the flat-type semiconductor device
1
to be replaced, and insert a new flat-type semiconductor device
1
. With the size and weight of the flat-type semiconductor devices
1
increasing nowadays, a large force or a dedicated jig is needed for lifting each flat-type semiconductor device
1
. Furthermore, there is an increased risk of damaging the flat-type semiconductor device
1
by the center pins
3
when replacing it, resulting in a significant deterioration in reliability of the flat-type semiconductor device
1
.
The flat-type semiconductor devices
1
and the heat-radiating elements
2
are positioned by visually aligning the center pins
3
and the positioning holes
3
a.
As a result of the increase in size of the flat-type semiconductor devices
1
, their central positions have become distant from the viewpoint of a worker, and this makes it difficult and time-consuming to carry out position alignment work. In addition, if the gaps between one flat-type semiconductor device
1
and the heat-radiating elements
2
are eliminated before their centers are accurately aligned, the flat-type semiconductor device
1
or the adjacent heat-radiating elements
2
could be damaged, resulting in a deterioration of electrical performance of the flat-type semiconductor device
1
or of heat-dissipating performance of the heat-radiating elements
2
.
SUMMARY OF THE INVENTION
This invention has been made to provide a solution to the aforementioned problems of the prior art. Specifically, it is an object of the invention to provide a flat-type semiconductor stack which requires reduced space allowance that enables a flat-type semiconductor device and its adjacent heat-radiating element to be moved for making a gap between them, wherein the flat-type semiconductor device and the heat-radiating element can be accurately and easily aligned with reduced risk of physical damages.
According to the invention, a flat-type semiconductor stack, which is formed by alternately stacking flat-type semiconductor devices and heat-radiating elements and pressurizing them in their stacking direction, comprises a position alignment mechanism for aligning contact surfaces of at least one each flat-type sem
Shimomura Yasuhito
Yamaguchi Hiroaki
Flynn Nathan J.
Greene Pershelle
Mitsubishi Denki & Kabushiki Kaisha
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