Electric lamp and discharge devices – With gas or vapor – Three or more electrode discharge device
Reexamination Certificate
2000-11-08
2003-04-08
Patel, Nimeshkumar D. (Department: 2879)
Electric lamp and discharge devices
With gas or vapor
Three or more electrode discharge device
C313S495000, C313S634000, C445S025000, C445S024000
Reexamination Certificate
active
06545410
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a flat panel display (FPD), and more particularly, to a flat panel display with a sealing channel filled with the sealing frit.
2. Description of the Prior Art
With the progressive development of the electronics industry, the demand for flat panel displays (FPD) has increased. The plasma display panel (PDP) has the greatest market potential amongst all FPDs. In the manufacturing process of a PDP, a front substrate is placed above a rear substrate, then these substrates are sealed together to form the discharge cell. The quality of the sealing process affects the yields of the subsequent processes for removing air and injecting the discharge gases from the PDP, and also influences the isolation of the discharge cells. Therefore, it is necessary to improve the reliability and quality of the sealing process.
Please refer to FIG.
1
and
FIG. 2
which are the schematic diagrams of a plasma display panel
10
according to the prior art. The plasma display panel
10
includes a front substrate
12
, and a rear substrate
14
parallel to and spaced apart from the front substrate
12
for forming a gap between the front substrate
12
and the rear substrate
14
. A plurality of scanning electrodes
16
, a dielectric layer
17
, and a MgO layer
18
are formed on the front substrate
12
. A display area
20
is defined on a surface of the rear substrate
14
that faces the front surface. Further, a plurality of barrier ribs
22
are positioned on the display area
20
.
As shown in
FIG. 1
, in the sealing process of the front substrate
12
and the rear substrate
14
, a sealing frit
24
is formed along the boundary of the display area
20
on the rear substrate
14
. Then, a heating process is performed to sinter the sealing frit
24
so as to temporarily stabilize the sealing frit
24
. As shown in
FIG. 2
, in the prior sealing method, a clamp
26
is used to hold the front substrate
12
and the rear substrate
14
tightly together in order to fix the distance between the front substrate
12
and the rear substrate
14
. Furthermore, the front substrate
12
and the rear substrate
14
are placed into an oven of a temperature of approximately 450° C. In the process, the sealing frit
24
made of low melting point glass, melts to bond the front substrate
12
together with the rear substrate
14
. After cooling, the front substrate
12
and the rear substrate
14
are tightly fixed and sealed together.
The sealing frit
24
is formed along the boundary of the display area. Prior to sintering, the sealing frit
24
is soft and disperses easily but lacks uniformity in height. Due to the uneven height of the sealing frit
24
, a space exists between part of the sealing frit
24
and the front substrate
12
, and the front substrate
12
can't be hermetically sealed with the rear substrate
14
. The bonding strength between he two substrates becomes seriously affected and may cause gas leakage. As well, there is difficulty in the control of the coating path and the dispersion of the sealing frit powder. Moreover, positioning of the sealing frit
24
requires precise control, otherwise, the sealing frit
24
will pollute the display area
20
or other components. The clamp
26
requires the support of the barrier ribs
22
in the display area
20
for exerting some force in sealing the front substrate
12
with the rear substrate
14
. However, the clamp
26
may rupture the MgO layer
18
in the display area
20
to influence the picture quality of the plasma display panel (PDP).
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a plasma display panel (PDP) having a sealing channel to solve the above-mentioned problems.
According to the present invention, the PDP includes a front substrate, a rear substrate parallel to and spaced apart from the front substrate for forming a gap between the front and rear substrates. A display area is positioned on the surface of the rear substrate that faces the front substrate. The plasma display panel further includes a plurality of barrier ribs positioned on the display area of the rear substrate, a first channel rib positioned on at least two sides of the display area of the rear substrate, and a second channel rib spaced from the first channel rib by a predetermined distance. The first channel rib and the second channel rib form a sealing channel. A sealing frit fills the sealing channel so as to seal the front substrate and the rear substrate together. Additionally, a joint notch can be formed on the front substrate. The position of the joint notch is opposite to the first channel rib and the second channel rib, so that top surfaces of the first and the second channel ribs are in contact with the surface of the joint notch. A plurality of grooves may additionally be formed on the top surface of the first or second channel ribs for increasing the effective sealing area of the sealing frit.
The sealing frit is formed in the sealing channel to eliminate the heating process used to temporarily sinter the sealing frit. The result prevents the destruction of the sealing frit during the sealing process and the sealing channel improves the uniformity of height as well as precisely controlling the position of the sealing frit. Hence, the yield and quality of the sealing process can be increased.
These and other objectives of the present invention will no doubt become obvious to those of ordinary skills in the art after reading the following detailed description of the preferred embodiment, which is illustrated in the various figures and drawings.
REFERENCES:
patent: 5600203 (1997-02-01), Namikawa et al.
patent: 5670843 (1997-09-01), Matsuura
patent: 5754003 (1998-05-01), Murai et al.
patent: 6030267 (2000-02-01), Browning
patent: 6129603 (2000-10-01), Sun et al.
patent: 6312302 (2001-11-01), Na
patent: 6479944 (2002-11-01), Lee et al.
Chen Po-Cheng
Chieng Tzu-Pang
Wu Jiun-Han
AU Optronics Corp.
Colón German
Hsu Winston
Patel Nimeshkumar D.
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