Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2001-01-04
2003-04-01
Hjerpe, Richard (Department: 2674)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S099000, C345S100000, C345S205000, C345S213000, C326S060000, C326S080000, C326S081000, C326S082000, C326S083000, C326S086000
Reexamination Certificate
active
06542144
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2000-002796, filed Jan. 11, 2000, the entire contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
This invention relates to a flat panel display having an embedded driver circuit where scanning lines driver circuits and signaling lines driver circuits are integrated with TFT pixels, and to its driving method.
The active matrix type liquid crystal display (hereafter, AM-LCD) using semiconductor switching devices is one of the representative flat panel liquid crystal displays. In particular, the thin film transistor type liquid crystal display (hereafter, TFT-LCD), which uses thin film transistors (hereafter, TFTs) as switching devices made of amorphous-silicon thin films or poly-silicon thin films, has been intensively developed.
This type of TFT-LCD employs a method for controlling voltage applied on the liquid crystal in each pixel by the use of semiconductor switching devices fabricated on a transparent insulator substrate, for example, glass. Such displays, featured by clear images, are widely used as OA terminals and graphic displays for TV screens.
In recent years, TFT-LCDs have been developed where the scanning lines driver circuits and signaling driving lines driver circuits are fabricated and integrated with TFT pixels on a transparent insulator substrate, instead of placing such circuits in the outside of the transparent insulator substrate of the liquid crystal display. Poly-silicon-based TFT (hereafter, p-SiTFT) is particularly employed in this type of circuit configuration.
As shown in
FIG. 10
, the scanning lines driver circuit is comprised of a timing circuit
2
A made of shift registers, a level shifter circuit
2
B that shifts the logic-based source voltage to the operation voltage for TFT pixels, and a buffer circuit
2
C corresponding to the load of scanning lines.
The TFT-LCD panel having the embedded driving circuits where the scanning lines driver circuits and TFT pixels are fabricated together on a transparent insulator substrate is under development to attain larger panel sizes and higher resolution.
As the panel size becomes larger, the length of each scanning line becomes longer. For higher resolution, the pulse intervals in driving scan lines and accordingly the lateral blanking time are shortened.
As the scanning lines become longer, their resistance and capacitance increase, leading to longer delay in the scanning lines driver pulse.
Quality degradation such as brightness fluctuations occurs in the direction of scanning lines because of the above problems.
Therefore, the load in scanning lines should be reduced and the delay in scanning lines driver pulses should be shortened to provide higher resolution in the display.
A measure to handle such problems, as shown in
FIG. 11
, is that the scanning lines driver circuit is configured to supply driver pulses from both sides of the display panel by mounting scanning line driver circuits on both sides of the display panel, instead of supplying driver pulses from either side of the display panel for the whole length of each scanning line by mounting the scanning line driver circuit on either side of the display panel. When the two methods compared with each other for a panel of a given size, the magnitude of the maximum pulse delay in the both-side driving method becomes one forth of that of the one-side driving method, because the resistance and capacitance in each scanning line become half in the both-side driving method.
This is an attempt to reduce the delay in scanning line pulses by mounting the scanning line driver circuits on both sides of the panel in order to raise the size and resolution of panels.
As demonstrated above, the method of driving scanning lines from both sides of the panel is effective to raise the size and resolution of panels. However, the magnitudes of two scanning lines driver pulses sent from both scanning lines driver circuits (those mounted on both sides of the panel) cannot be equalized, because it is difficult to completely eliminate the difference in magnitudes of those two scanning lines driver pulses due to a probability reason. As a result, when there is a difference in two voltage outputs, an electric current flows from the higher voltage side to the lower voltage side between the two scanning line driver circuits, causing a rise in power consumption and damage in the driving circuits.
It has been found that the reason why different voltages of scanning lines driver pulses are generated between the two scanning lines driver circuits is an instability in operation at power-on in the level shifter in the block circuit shown in FIG.
10
.
BRIEF SUMMARY OF THE INVENTION
The present invention is made to solve the above problem, and accordingly, the object of this invention is to provide scanning lines driver circuits and their driving method that can display high quality of images on the screens of large flat panel displays with high resolution without damaging their circuits.
This invention provides a scanning lines driver circuit that provides scanning lines driver signals for the scanning lines on active matrix type liquid crystal displays having a plurality of scanning lines, a plurality of image signaling lines crossing orthogonal to these scanning lines and pixel switching devices connected to these scanning lines and image signaling lines, comprising:
a first voltage source;
a plurality of gate voltage sources;
a power source detection circuit;
transistors controlled by the power source detection circuit;
a timing generation circuit to which voltage is supplied from the first voltage source;
a level shifter circuit that is connected to the first voltage source and a plurality of gate voltage sources and generates voltage for driving the image switching devices; and
a gate buffer that supplies the output voltage from the level shifter circuit to the scanning lines;
wherein the level shifter circuit is made of serially connected flip-flop type level shifter circuits that shift voltage levels for each of the gate voltage sources and the transistors are arranged in parallel with the outputs of the level shifter circuits.
Further, this invention provides a power-on sequence for the scanning lines driver circuit that provides scanning lines driver signals for the scanning lines on active matrix type liquid crystal displays having a plurality of scanning lines, a plurality of image signaling lines crossing orthogonal to these scanning lines and pixel switching devices connected to these scanning lines and image signaling lines, comprising:
a first voltage source;
a plurality of gate voltage sources;
a power source detection circuit;
transistors controlled by the power source detection circuit;
a timing generation circuit to which voltage is supplied from the first voltage source;
a level shifter circuit that is connected to the first voltage source and a plurality of gate voltage sources and generates voltage for driving the image switching devices; and
a gate buffer that supplies the output voltage from the level shifter circuit to the scanning lines;
comprising the steps of:
turning on the first voltage source that enables the operation of the timing generation circuit; and
shifting each gate voltage by turning on each gate voltage in the same order as that of serially connected level shifter circuits.
Yet further, this invention provides a scanning lines driver circuit that provides a plurality of scanning lines in sequence with scanning pulses including high and low level voltages, comprising:
a first level shifter circuit and a second level shifter circuit which are serially connected;
a first transistor and a second transistor which are connected in parallel to the outputs of the first and second level shifter circuits; and
a power source detection circuit that controls the first and second transistors.
Additionally, this invention provides a flat display driving method for the flat p
Kogure Hideyuki
Nakamura Kazuo
Hjerpe Richard
Kabushiki Kaisha Toshiba
Nguyen Jennifer T.
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
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