Flat panel display and chip bonding pad

Details Flat panel display and chip bonding pad Flat panel display and chip bonding pad

2008-07-21

2011-11-15

Chen, Wen-Ying P (Department: 2871)

Liquid crystal cells, elements and systems

Particular structure

Having significant detail of cell structure only

C349S151000, C349S152000, C349S149000

Reexamination Certificate

active

08059249

ABSTRACT:
A flat panel display and a chip bonding pad thereof are provided. The flat panel display includes a display panel, an FPC board, first and second source driving chips, and a control circuit board. First and second wires in a peripheral circuit region of the display panel extend from the underneath of the FPC board to two opposite sides of the display panel and electrically connect the FPC board. The first source driving chips electrically connect the FPC board through parts of the first wires. The second source driving chips electrically connect the FPC board through the second wires. The chip bonding pad is under one of the first and second source driving chips. The chip bonding pad includes a first dielectric layer having first through holes and a second dielectric layer having second and third through holes arranged alternately. The second through holes correspond to the first through holes.

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“1st Office Action of China counterpart application”, issued on Jul. 3, 2009, p. 1-p. 5.

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