Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2004-09-10
2008-11-11
Hjerpe, Richard (Department: 2629)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C257S066000, C257S072000, C257S291000
Reexamination Certificate
active
07450100
ABSTRACT:
A high-speed flat panel display having a long lifetime. Thin film transistors in a pixel portion having a plurality of pixels are contacted differently from thin film transistors in driving circuit portions for driving the pixels, thereby enhancing luminance uniformity and reducing power consumption. The thin film transistors each have a channel region and a body contact region for applying a predetermined voltage to the channel region. At least one thin film transistor in the pixel portion is a source-body contact thin film transistor having the body contact region connected to one of source and drain electrodes so that the predetermined voltage can be provided to the channel region. Each thin film transistor in the driving circuit portion is a gate-body contact thin film transistor having the body contact region connected to the gate electrode so that a predetermined voltage can be provided to the channel region.
REFERENCES:
patent: 6166786 (2000-12-01), Ohkubo et al.
patent: 7038276 (2006-05-01), Ker et al.
patent: 7064388 (2006-06-01), Hayakawa et al.
patent: 7276730 (2007-10-01), Yamazaki et al.
patent: 2002/0153569 (2002-10-01), Katayama
patent: 0 816 903 (1998-01-01), None
patent: 11-54759 (1999-02-01), None
patent: 2003-7719 (2003-01-01), None
patent: 2003-152184 (2003-05-01), None
patent: 2003-174172 (2003-06-01), None
patent: 10-2004-0092916 (2004-11-01), None
patent: 10-2005-0018530 (2005-02-01), None
Korean Patent Abstracts, Publication No. 1020050018530, dated Feb. 23, 2005 in the name of Byoung Deog Choi et al.
Korean Patent Abstracts, Publication No. 1020040092916, dated Nov. 4, 2004 in the name of Seong Sik Bae et al.
Patent Abstracts of Japan, Publication No. 11-054759, dated Feb. 26, 1999, in the name of Takashi Yamada et al.
Patent Abstracts of Japan, Publication No. 2003-007719, dated Jan. 10, 2003, in the name of Kazuki Kitamura et al.
Patent Abstracts of Japan, Publication No. 2003-152184, dated May 23, 2003, in the name of Yutaka Hayashi et al.
Patent Abstracts of Japan, Publication No. 2003-174172, dated Jun. 20, 2003, in the name of Takashi Yamada et al.
European Search Report dated Aug. 21, 2007, for EP 04090350.2, in the name of Samsung SDI Co., Ltd.
Choi Byoung-Deog
Koo Jae-Bon
Christie Parker & Hale LLP
Hjerpe Richard
Samsung SDI & Co., Ltd.
Shapiro Leonid
LandOfFree
Flat panel display does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Flat panel display, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Flat panel display will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4047022