Flat-cell read-only-memory integrated circuit

Details Flat-cell read-only-memory integrated circuit Flat-cell read-only-memory integrated circuit

1990-09-05

1992-05-26

Clawson, Jr., Joseph E.

Static information storage and retrieval

Read only systems

Semiconductive

365178, 365184, 357 2312, 357 45, G11C 1710

Patent

active

051173891

ABSTRACT:
A flat-cell ROM array reduces the number of block select transistors utilized, allows for the layout of straight metal lines, while sharing the metal lines between even and odd banks, and achieves very high density and high performance. Parallel buried diffusion regions are deposited in the substrate. A gate oxide is laid over the substrate. A plurality of polysilicon word lines are laid over the gate oxide perpendicular to the buried diffusion regions, so that the areas between the respective pairs of buried diffusion regions and under the polysilicon word lines, form columns of flat cell field effect transistors. An insulating layer is laid over the polysilicon word lines, and a plurality of metal bit lines and virtual ground lines is deposited. These metal lines are shared by even and odd columns of field effect transistors. Access to the metal lines is made through a plurality of LOCOS block select transistors connected to every other buried diffusion bit line. The alternate buried diffusion bit lines are connected through either a buried diffusion region to its left or a buried diffusion region to its right to the metal lines, by means of bank right and left select transistors.

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Okada, et al.; "16 Mb ROM Design Using Bank Select Architecture"; Symposium on ULSI Circuits; Tokyo, Japan, Aug. 22-24, 1988; Digest of Technical Papers, pp. 85-86.

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