Flash mirror bit architecture using single program and erase...

Details Flash mirror bit architecture using single program and erase... Flash mirror bit architecture using single program and erase...

2011-08-23

2011-08-23

Nguyen, VanThu (Department: 2824)

Static information storage and retrieval

Floating gate

Multiple values

C365S185110, C365S185140

Reexamination Certificate

active

08004888

ABSTRACT:
Flash memory systems and methods for facilitating a single logical cell erasure in a flash memory device whereby logical cell mapping is changed from using a single physical cell to using pair physical cells, thereby creating a single program and erase entity as a single logical cell. By mapping two adjacent physical cells as a single logical cell, the flash memory device can be programmed and erased on a single bit or variable bit length basis with conventional technologies. Various operations can be performed on a flash device on a basis of the single program and erase entity.

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