Static information storage and retrieval – Floating gate – Particular biasing
Patent
1999-08-10
2000-08-22
Fears, Terrell W.
Static information storage and retrieval
Floating gate
Particular biasing
36518529, 365 51, G11C 700
Patent
active
061082422
ABSTRACT:
A flash memory with a split gate. The flash memory is formed on a semiconductor substrate, comprising a channel region, a tunnel oxide layer, a floating gate, a control gate, a dielectric layer and two source/drain regions. The channel region is located on a surface of the semiconductor substrate and partly covered by the floating gate. The floating gate is funnelform, that is, having a gradually diffusing cross sectional profile from a bottom surface to a top surface, and has a tunnel oxide layer to isolate with the semiconductor substrate, and there is an annulus tip on the rim of the top surface. The dielectric layer is located on a part of the top surface and a sidewall of the floating gate and a part of the channel region uncovered by the floating gate. The control gate is formed on the dielectric layer, and the source/drain regions are formed in the semiconductor at both sides of the channel region. The flash memory further comprises a reverse triangular doped region is formed by a delta doping step, and therefore, the source line capacitance is reduced to be advantageous to anti-punch through effect. Further, compared to conventional method, the annulus tip with a sharper profile has a greatly improved operation speed with a reduced erasure voltage.
REFERENCES:
patent: 5070032 (1991-12-01), Yuan
Chen Hsin-Ming
Lin Chrong-Jung
Fears Terrell W.
Huang Jiawei
Taiwan Semiconductor Mfg. Co. Ltd.
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