Flash memory with reduced size and method for accessing the...

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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C365S185170, C365S185330

Reexamination Certificate

active

07154784

ABSTRACT:
A flash memory device is provided with reduced size and method of accessing the same. In the flash memory device, since memory cells are each coupled to a plurality of bitline pairs and is configured to be accessed by a single page buffer circuit and a single Y-gate circuit, it is possible to reduce the number of the Y-gate circuits and thereby to shrink down the size of the flash memory device.

REFERENCES:
patent: 5761132 (1998-06-01), Kim
patent: 6067248 (2000-05-01), Yoo
patent: 6288936 (2001-09-01), Kawamura
patent: 6556504 (2003-04-01), Kwon et al.
patent: 6930919 (2005-08-01), Lee et al.
patent: 6967868 (2005-11-01), Kim et al.
patent: 7061813 (2006-06-01), Lee
patent: 2003-0011234 (2003-02-01), None

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