Flash memory system

Details Flash memory system Flash memory system

1996-01-18

1997-06-17

Nguyen, Viet Q.

Static information storage and retrieval

Floating gate

Particular biasing

36518511, 36523003, 36518905, 36518907, G06F 308

Patent

active

056403496

ABSTRACT:
A flash memories (20, 21) are coupled with a host computer (1) through a flash memory controller (2) which has a pair of data buses (27, 28), and a pair of buffer memories (22, 23). Each of said data buses is coupled with a related flash memory, and a related buffer memory, which is coupled with said host computer. Said data buses (22, 23) are controlled to operate simultaneously so that said flash memories are accessed simultaneously in parallel form. A data in said host computer is transferred to said flash memories through said buffer memories and said data buses, and vice versa. All the elements (20, 21, 2) are mounted on a plastics card (100) called a flash memory card, which is coupled with a host computer through a connector. Because of use of a plurality of buses operating in parallel form, the transfer time of data between a host computer and a flash memory card is shortened.

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"An Experimental Active Memory Based I/O Subsystem"; ASTHANA et al.; Computer Architecture News, Sep. 1994, vol. 22, No. 4, pp. 29-34.

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