Flash memory structure and operating method thereof

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185290, C365S185260

Reexamination Certificate

active

06914826

ABSTRACT:
A flash memory structure is provided. The flash memory structure includes a P-type substrate, a deep N-well set up within the P-type substrate, a P-well set up within the deep N-well, a pair of gate structures set up over the substrate, a select gate set up between the pair of gate structure and N-type source/drain regions in the P-well on each side of the gate structure. Since each pair of neighboring gate structure uses a common gate, the level of integration of device can be increased.

REFERENCES:
patent: 6026025 (2000-02-01), Tanaka et al.

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