Static information storage and retrieval – Floating gate – Particular biasing
Patent
1998-04-27
1999-08-03
Fears, Terrell W.
Static information storage and retrieval
Floating gate
Particular biasing
365218, G11C 1300
Patent
active
059333685
ABSTRACT:
An architecture for a mass storage system using flash memory is described. This architecture involves organizing the flash memory into a plurality of blocks. These blocks are then divided into several categories. One of the categories is a working category used to store data organized in accordance with a pre-defined addressing scheme (such as the logical block address used in Microsoft's operating system). The other category is a temporary buffer used to store data intended to be written to one of the working blocks. Another category contains blocks that need to be erased. When data is written into the mass storage system, a block in the second category is allocated from a block in the third category. The allocated block will then be changed to a block in the first category when writing to the allocated block is completed. The correspond block in the first category is placed into the third category. As a result, blocks can be recycled. Consequently, there is a constant supply of blocks in the second category. In another embodiment of the present invention, a new category is developed to handle random writing to the working blocks.
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Hu Ting-Chung
Lee Ju-Xu
Lee Li-Jen
Lee Tai-Yao
Lin Chu-Hung
Fears Terrell W.
Haynes Mark A.
Macronix International Co. Ltd.
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