Flash memory having data refresh function and data refresh metho

Static information storage and retrieval – Floating gate – Data security

Patent

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36518509, 36518511, 36518522, 36518525, 36518529, 36518533, 36518907, 365200, 365201, 365218, 365222, 371 211, 371 212, G11C 700, G11C 2900

Patent

active

055746845

ABSTRACT:
A flash memory and its data refresh method, where data read out in program verify mode and erase verify mode from read address are compared in each address (ST110), and data of a memory cell corresponding to inconsistent data are rewritten (ST112). Or adding values of data read out in the program verify mode and the erase verify mode are compared in each block (ST137) and a defective block is retrieved and data in each address are compared in the defective block (ST160), and data of a memory cell corresponding to inconsistent data are rewritten (ST162). Thereby, defective data can be retrieved and corrected.

REFERENCES:
patent: 5337281 (1994-08-01), Kobayashi et al.
patent: 5361343 (1994-11-01), Kosonocky et al.
patent: 5379256 (1995-01-01), Tanaka et al.
patent: 5414664 (1995-05-01), Lin et al.
Virgil Niles Kynett et al, An In-System Reprogrammable 32Kx8 CMOS Flash Memory, IEEE Journal of Solid-State Circuits, vol. 23, No. 5, Oct. 1988, pp. 1157-1163, is cited on p. 2 of the specification.

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