Flash memory device with reduced access time

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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Details

C365S185090, C365S191000

Reexamination Certificate

active

11306071

ABSTRACT:
A flash memory device with a reduced access time. The flash memory device executes an error detection and correction operation while encoding or decoding transmission and reception signals with a host apparatus. The flash memory device utilizes a simplified design algorithm and reduces an access time.

REFERENCES:
patent: 5606532 (1997-02-01), Lambrache et al.
patent: 6101624 (2000-08-01), Cheng et al.
patent: 2002/0184585 (2002-12-01), Wadley
patent: 2001-175586 (2001-06-01), None
patent: 2002-140900 (2002-05-01), None
patent: 2000-0075258 (2000-12-01), None
patent: 1999-0066892 (2001-07-01), None

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