Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2007-04-03
2007-04-03
Auduong, Gene N. (Department: 2827)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185200, C365S185130
Reexamination Certificate
active
11160278
ABSTRACT:
The present patent relates to flash memory devices with improved erase function, and method of controlling an erase operation of the same. According to the present patent, the flash memory device includes memory cell blocks, each having a plurality of memory cells sharing local word lines and bit lines, an X-decoder which decodes a row address signal and outputs the decoded signal, a block selection unit, which selects some of the memory cell blocks in response to the decoded signal, and connects local word lines of the selected memory cell blocks to corresponding global word lines, respectively, and a high voltage generator, which generates word line bias voltages in response to one of a read command, a program command and an erase command, and supplies the generated word line bias voltages to the global word lines in response to the decoded signal, respectively, wherein the word line bias voltages, which are generated by the high voltage generator in response to the erase command, have a positive value, respectively. Accordingly, a positive bias voltage is applied to a global word line in an erase operation. It is thus possible to prevent a shallow erase phenomenon of non-selected memory cell blocks due to the leakage current of pass gates.
REFERENCES:
patent: 5818758 (1998-10-01), Wojciechowski
patent: 5991198 (1999-11-01), Song et al.
patent: 6327194 (2001-12-01), Kurihara et al.
patent: 2005/0018489 (2005-01-01), Hosono
Office action for Korean patent applcation No. 2005-20182 filed Mar. 10, 2005.
Auduong Gene N.
Townsend and Townsend / and Crew LLP
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