Flash memory device having improved program rate

Static information storage and retrieval – Floating gate – Multiple values

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C365S185180, C365S185220

Reexamination Certificate

active

11212850

ABSTRACT:
A method is provided for programming a nonvolatile memory device including an array of memory cells, where each memory cell including a substrate, a control gate, a charge storage element, a source region and a drain region. The method includes receiving a programming window that identifies a plurality of memory cells in the array. A first group of memory cells to be programmed is identified from the plurality of memory cells in the programming window. The first group of memory cells is programmed and a programming state of the first group of memory cells is verified.

REFERENCES:
patent: 5291446 (1994-03-01), Van Buskirk et al.
patent: 5301097 (1994-04-01), McDaniel
patent: 5539688 (1996-07-01), Yiu et al.
patent: 5638326 (1997-06-01), Hollmer et al.
patent: 5890192 (1999-03-01), Lee et al.
patent: 5892710 (1999-04-01), Fazio et al.
patent: 6044022 (2000-03-01), Nachumovsky
patent: 6101125 (2000-08-01), Gorman
patent: 6272670 (2001-08-01), Van Myers et al.
patent: 6295228 (2001-09-01), Pawletko et al.
patent: 6327181 (2001-12-01), Akaogi et al.
patent: 6424570 (2002-07-01), Le et al.
patent: 6426893 (2002-07-01), Conley et al.
patent: 6452869 (2002-09-01), Parker
patent: 6487121 (2002-11-01), Thurgate et al.
patent: 6496410 (2002-12-01), Parker
patent: 6538923 (2003-03-01), Parker
patent: 6570785 (2003-05-01), Mangan et al.
patent: 6724662 (2004-04-01), Manea
patent: 6747900 (2004-06-01), Park et al.
patent: 6775187 (2004-08-01), Hamilton et al.
patent: 6816001 (2004-11-01), Khouri et al.
patent: 6894929 (2005-05-01), Matsuoka et al.
patent: 6952366 (2005-10-01), Forbes
patent: 6996021 (2006-02-01), Derner et al.
patent: 7020018 (2006-03-01), Hsieh et al.
patent: 7149110 (2006-12-01), Tran et al.
patent: 7151701 (2006-12-01), Combe et al.
patent: 7190616 (2007-03-01), Forbes et al.
patent: 2002/0167844 (2002-11-01), Han et al.
patent: 2003/0093233 (2003-05-01), Rajguru
patent: 2003/0142544 (2003-07-01), Maayan et al.
patent: 2004/0027857 (2004-02-01), Ooishi
patent: 2004/0037113 (2004-02-01), Ooishi
patent: 2005/0232017 (2005-10-01), Fujisawa et al.
patent: WO 03/063167 (2003-07-01), None
patent: WO 2005/106891 (2005-11-01), None
International Search Report and Written Opinion dated Jan. 15, 2007.
Co-pending U.S. Appl. No. 11/212,614, filed Aug. 29, 2005, entitled: “Voltage Regulator with Less Overshoot and Faster Settling Time,” Yonggang Wu et al.; 30 pp.
Co-pending U.S. Appl. No. 11/229,664, filed Sep. 20, 2005, entitled: “Flash Memory Programming Using an Indication Bit to Interpret State,” Takao Akaogi et al.; 25 pp.
2002 IEEE International Solid-State Circuits Conference, Session 6, “SRAM and Non-Volatile Memories,” Feb. 4, 2004,6 pages.
2002 IEEE International Solid-State Circuits Conference, 29 pages.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Flash memory device having improved program rate does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Flash memory device having improved program rate, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Flash memory device having improved program rate will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3875617

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.