Flash memory device having erase verification

Details Flash memory device having erase verification Flash memory device having erase verification

1995-08-24

1997-03-25

Nelms, David C.

Static information storage and retrieval

Floating gate

Particular biasing

36518529, 365218, G11C 1134

Patent

active

056151543

ABSTRACT:
At the time of erasing, the erase verification is not effected but the erase voltage is repetitively applied to the source of a memory cell until it is so judged that the erase current I.sub.A flowing into the source of the memory is smaller than the reference current I.sub.B and when it is judged that the erase current I.sub.A flowing into the source of the memory cell is smaller than the reference current I.sub.B, application of the erase pulse to the source of the memory cell and the erase verification are repetitively effected. As a result, in the flash memory device, it is possible to decrease the number of times of erase verification and reduce the time required for the erasing.

REFERENCES:
patent: 5428570 (1995-06-01), Iwahashi
patent: 5463587 (1995-10-01), Maruyama

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