Static information storage and retrieval – Floating gate – Particular connection
Patent
1998-09-24
1999-08-31
Phan, Trong
Static information storage and retrieval
Floating gate
Particular connection
36518513, 36518523, 36518533, G11C 1604, G11C 1606
Patent
active
059462329
ABSTRACT:
A semiconductor device and method is providing having a memory cell array divided into a plurality of sectors and an erasing operation is preferably performed by sectors. The sectors are sub-divided into two or more sub-sectors, and at least one word line inside each of the sub-sectors is commonly coupled to another word line inside a different sub-sector. Thus, a plurality of word lines can be commonly coupled to a single word line decoder. Accordingly, a number of required word line decoders for the semiconductor device is reduced. Further, size and power requirements of the semiconductor device can be reduced.
REFERENCES:
patent: 5065364 (1991-11-01), Atwood et al.
patent: 5245570 (1993-09-01), Fazio et al.
patent: 5270980 (1993-12-01), Pathak et al.
patent: 5280447 (1994-01-01), Hazen et al.
patent: 5329488 (1994-07-01), Hashimoto
patent: 5740108 (1998-04-01), Okubo
patent: 5748528 (1998-05-01), Campardo et al.
patent: 5848000 (1998-12-01), Lee et al.
LG Semicon Co. Ltd.
Phan Trong
LandOfFree
Flash memory device and method that operates a memory cell array does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Flash memory device and method that operates a memory cell array, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Flash memory device and method that operates a memory cell array will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2427903