Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
2011-04-26
2011-04-26
Smith, Matthew S (Department: 2823)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C438S692000, C438S700000, C438S426000, C438S427000, C257SE21332, C257SE21209, C257SE21422
Reexamination Certificate
active
07932159
ABSTRACT:
The present invention relates to flash memory devices and a method of fabricating the same. In an aspect of the present invention, the flash memory device includes trenches formed in a semiconductor substrate and having a step at their lower portion, a tunnel insulating layer formed in an active region of the semiconductor substrate, first conductive layers formed on the tunnel insulating layer, an isolation layer gap-filling between the trenches and the first conductive layers, and a second conductive layer formed on the first conductive layer and having one side partially overlapping with the isolation layers.
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Translation of the First Office Action for corresponding Chinese Patent Application No. 200810132034.0, dated Jan. 22, 2010.
Baptiste Wilner Jean
Hynix / Semiconductor Inc.
Marshall & Gerstein & Borun LLP
Smith Matthew S
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