Flash memory device and method for driving the same

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185190

Reexamination Certificate

active

07072221

ABSTRACT:
A flash memory device which can reduce the whole program or erase time and improve reliability by cycling, by storing a pulse width or a bias level for passing at least one bit of cells of a first page in a program or erase operation using an ISPP scheme, and using the stored pulse width or bias level as an initial pulse width or an initial bias level in a succeeding program operation or erase operation, and a method for driving the same.

REFERENCES:
patent: 5467309 (1995-11-01), Tanaka et al.
patent: 6181605 (2001-01-01), Hollmer et al.
patent: 6222779 (2001-04-01), Saito et al.
patent: 6292394 (2001-09-01), Cohen et al.
patent: 6807102 (2004-10-01), Imamiya et al.
patent: 1020030063083 (2003-07-01), None

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