Flash memory comprising means for checking and refreshing...

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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Details

C365S222000

Reexamination Certificate

active

07050335

ABSTRACT:
The present invention relates to a method for checking and refreshing a floating-gate transistor in the erased state, comprising the steps of applying a positive erase voltage to a control gate of the floating-gate transistor, and selectively applying a positive erase voltage to the drain of the floating-gate transistor, by means of a programming latch for example. Application to checking and refreshing memory pages in a Flash memory.

REFERENCES:
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patent: 5400287 (1995-03-01), Fuchigami
patent: 5633823 (1997-05-01), Lee
patent: 6084471 (2000-07-01), Ruth, Jr. et al.
patent: 6124761 (2000-09-01), Robinson et al.
patent: 6166959 (2000-12-01), Gupta et al.
patent: 6240032 (2001-05-01), Fukumoto
patent: 6515910 (2003-02-01), Lee et al.
patent: 6636440 (2003-10-01), Maayan et al.
patent: 1 233 421 (2002-08-01), None
patent: 1 271 552 (2003-01-01), None
Derwent Database WPI Accession No. 2001-057886 for KR 2000 010 421 A, published Feb. 15, 2000.

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