Flash memory comprising an erase verify algorithm integrated...

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185090, C365S185030

Reexamination Certificate

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06891756

ABSTRACT:
An electrically erasable and programmable memory includes memory cells and a verify-program device. The memory also includes an erase verify device arranged for supplying an erase verify signal having a determined value when a datum read in a memory cell during a first verify-program cycle has an erase logic value. Application particularly to performing a blank verify test in serial input/output Flash memories.

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patent: 6519180 (2003-02-01), Tran et al.
patent: 20010048609 (2001-12-01), Hikida
patent: 20030101390 (2003-05-01), Di Zenzo et al.
patent: 0 782 147 (1997-07-01), None

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