Flash memory cell and methods for programming and erasing

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185310, C365S185030

Reexamination Certificate

active

07120063

ABSTRACT:
Flash memory cells are presented which comprise a dielectric material formed above a substrate channel region, a charge trapping material formed over the dielectric material, and a control gate formed over the charge trapping material. The cell may be programmed by directing electrons from the control gate into the charge trapping material to raise the cell threshold voltage. The electrons may be directed from the control gate to the charge trapping material by coupling a substrate to a substrate voltage potential, and coupling the control gate to a gate voltage potential, where the gate voltage potential is lower than the substrate voltage potential. The cell may be erased by directing electrons from the charge trapping material into the control gate to lower a threshold voltage of the flash memory cell, such as by coupling the substrate to a substrate voltage potential, and coupling the control gate to a gate voltage potential, where the gate voltage potential is higher than the substrate voltage potential.

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Brown, William D. and Joe E. Brewer, ed, Nonvolatile Semiconductor Memory Technology, 1998, IEEE Press, pp. 253-254 by Manzur Gill and Stefan Lai.

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