Flash memory blocking architecture

Static information storage and retrieval – Addressing – Plural blocks or banks

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

365185, 36523006, 365218, G11C 1134

Patent

active

052491587

ABSTRACT:
A blocking architecture for use in non-volatile semiconductor memories is disclosed. This architecture minimizes device area taken up by signal lines while maximizing device yield. Additionally, this architecture minimizes the Y decoding mechanism while maximizing device performance.

REFERENCES:
patent: 4783766 (1988-11-01), Samachisa et al.
patent: 4982372 (1991-01-01), Matsuo
patent: 5003510 (1991-03-01), Kamisaki
patent: 5065364 (1991-11-01), Atwood et al.
patent: 5083294 (1992-01-01), Okajima
patent: 5097450 (1992-03-01), Toda et al.
patent: 5109361 (1992-04-01), Yim et al.
patent: 5126808 (1992-06-01), Montalvo et al.
patent: 5148401 (1992-09-01), Sekino et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Flash memory blocking architecture does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Flash memory blocking architecture, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Flash memory blocking architecture will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2195416

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.