Flash memory array system including a top gate memory cell

Details Flash memory array system including a top gate memory cell Flash memory array system including a top gate memory cell

2007-02-16

2009-12-01

Tran, Andrew Q (Department: 2824)

Static information storage and retrieval

Floating gate

Particular connection

C365S185140, C365S185030

Reexamination Certificate

active

07626863

ABSTRACT:
A memory system includes memory cells arranged in sectors. A decoder corresponding to a sector disables memory cells having a defective top gate. The decoder may include a low voltage or high voltage latch for the disabling. A top gate handling algorithm is included. The memory system may include dynamic top gate coupling. A programming algorithm and waveforms with top gate handling is included.

REFERENCES:
patent: 5946235 (1999-08-01), Kramer et al.
patent: 5969383 (1999-10-01), Chang et al.
patent: 6002620 (1999-12-01), Tran et al.
patent: 6282145 (2001-08-01), Tran et al.
patent: 6324092 (2001-11-01), Jong et al.
patent: 6396745 (2002-05-01), Hong et al.
patent: 6504755 (2003-01-01), Katayama et al.
patent: 6593177 (2003-07-01), Lee
patent: 6747310 (2004-06-01), Fan et al.
patent: 6788595 (2004-09-01), Nguyen et al.
patent: 7035151 (2006-04-01), Tran et al.
patent: 7046552 (2006-05-01), Chen et al.
patent: 7149110 (2006-12-01), Tran et al.
patent: 7282411 (2007-10-01), Kanamitsu et al.
patent: 7325177 (2008-01-01), Tran et al.
patent: 2005/0269622 (2005-12-01), Klinger et al.
patent: 2007/0147131 (2007-06-01), Tran et al.
patent: 2009/0052248 (2009-02-01), Tran et al.
patent: 2009/0067239 (2009-03-01), Tran et al.

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