Flash memory array and decoding architecture

Static information storage and retrieval – Floating gate – Particular connection

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Details

36518505, 36518523, G11C 1604, G11C 1606

Patent

active

059532505

ABSTRACT:
A flash memory circuit includes a word line decoder with even and odd word line latches and a source line decoder with a source line latch. The word line decoders and the source line decoder provide the capability of erasing the memory cells of two adjacent word lines in a flash memory simultaneously and verifying the memory cells word line by word line. By erasing two adjacent rows simultaneously, the embodiments of this invention eliminate over-erasure and source disturbance problems associated with conventional flash memory circuits. The decoding architecture provides flexible erase size that may be from a pair to a large number of multiple pairs of word lines. By dividing the memory cells of a word line into a number of segments and having segmented source lines controlled by source segment control lines and transistors, the decoding circuit further provides the capability of selecting the memory cells of a word line segment for erasing. Several different approaches are presented for the layout of source segment control lines and transistors as well as the word lines.

REFERENCES:
patent: 4949309 (1990-08-01), Rao
patent: 5200922 (1993-04-01), Rao
patent: 5546402 (1996-08-01), Niijima et al.
patent: 5548551 (1996-08-01), Wang et al.
patent: 5646890 (1997-07-01), Lee et al.
patent: 5671177 (1997-09-01), Ucki
patent: 5687121 (1997-11-01), Lee et al.
patent: 5822252 (1998-10-01), Lee et al.

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