Static information storage and retrieval – Floating gate – Particular connection
Patent
1997-12-05
2000-01-11
Hoang, Huan
Static information storage and retrieval
Floating gate
Particular connection
36518529, 36518533, 36518511, G11C 1606
Patent
active
060143290
ABSTRACT:
A flash-erasable semiconductor memory device comprises a memory cell array including a plurality of memory cell transistors each having an insulated floating gate for storing information and a control electrode provided on said floating gate, wherein the flash-erasable semiconductor memory device includes a write control circuit supplied with a write control signal, when writing information. The write control circuit produces a control signal such that a leading edge of the drain control signal appears after a leading edge of the gate control signal. Further, the gate control circuit shuts off the gate control signal such that a trailing edge of the gate control signal appears after a trailing edge of the drain control signal.
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Akaogi Takao
Kajita Tatsuya
Ogawa Yasushige
Watanabe Hisayoshi
Yamashita Minoru
Fujitsu Limited
Fujitsu VLSI Limited
Hoang Huan
LandOfFree
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