Flash EPROM control with embedded pulse timer and with built-in

Details Flash EPROM control with embedded pulse timer and with built-in Flash EPROM control with embedded pulse timer and with built-in

1997-10-29

1999-02-16

Beausoliel, Jr., Robert W.

Excavating

371 2232, G01R 3128

Patent

active

058727949

ABSTRACT:
Built-In-Logic-Block-Observation registers BILBO are coupled to the output of a Control-Read-Only-Memory CROM in the write-state-machine of a flash EPROM. The Built-In-Logic-Block-Observation registers BILBO include master/slave latches M/SL, shadow latches SHL, and other logic circuitry that enable the various modes of operation required for pulse timing and for signature analysis. During operation a pre-defined FLASH command sequence requests a Control-Read-Only-Memory CROM signature analysis that executes a set of instructions causing the Built-In-Logic-Block-Observation registers BILBO to be placed in the Multiple-Input-Signature-Register Mode and that steps through the Control-Read-Only-Memory CROM until all valid addresses have been evaluated. The resultant Control-Read-Only-Memory CROM signature is then scanned out and verified. The invention eliminates the need for a separate stand-alone Linear-Feedback-Shift-Register LFSR used for pulse timing. The contents of the Control-Read-Only-Memory CROM are verified without the necessity for time-consuming scanning-out of each word.

REFERENCES:
patent: 4594711 (1986-06-01), Thatte
patent: 4801870 (1989-01-01), Eichelberger et al.
patent: 4903266 (1990-02-01), Hack
patent: 4991175 (1991-02-01), Easingwood-Wilson
patent: 5319646 (1994-06-01), Simpson

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