Flash EPROM cell and method for operating same

Static information storage and retrieval – Floating gate – Particular biasing

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365218, 365900, 257322, 257900, G11C 1134, G11C 700

Patent

active

052355446

ABSTRACT:
A flash EPROM cell may be erased by placing a negative voltage on the control gate of a flash EPROM cell having spaced apart source and drain regions in a semiconductor substrate, and having a floating gate, a control gate and a sidewall gate, while biasing the drain at a positive voltage.

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patent: 5126808 (1992-06-01), Montalvo et al.

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