Static information storage and retrieval – Floating gate – Particular biasing
Patent
1997-10-03
1999-12-07
Zarabian, A.
Static information storage and retrieval
Floating gate
Particular biasing
36518525, G11C 1134
Patent
active
059994568
ABSTRACT:
A Flash EEPROM having at least one memory sector. The memory sector includes a plurality of rows and columns of memory cells; at least one negative voltage generator for generating a negative voltage commonly charging the plurality of rows to a negative potential during an erase pulse for erasing the memory cells of the at least one memory sector and control logic activating the negative voltage generator at the beginning of the erase pulse and deactivating the negative voltage generator at the end of the erase pulse. The Flash EEPROM having for controlling a discharge time of the rows of the at least one memory sector at the end of the erase pulse.
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Feste, Jean-Pierre, "Une Seule Tension de 5V pour la Flash 16 Mbits," Electronique 2045(42):8, Nov., 1994.
Atsumi et al., "A 16-Mb Flash EEPROM With A New Self-Data-Refresh Scheme For A Sector Erase Operation," IEICE Transactions on Electronics E77-C(5):791-798, May, 1994.
Carrera Marcello
Sali Mauro
Villa Corrado
Carlson David V.
de Guzman Dennis M.
STMicroelectronics S.r.l.
Zarabian A.
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