Flash EEPROM memory with separate reference array

Static information storage and retrieval – Floating gate – Particular biasing

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Details

36518522, 36518528, G11C 700

Patent

active

056298927

ABSTRACT:
A memory device including an array of cells, where a reference current is generated by a predetermined number of reference cells disposed separate from the array of cells, the transconductance of such reference cells being equal to the transconductance of the cells of the array.

REFERENCES:
patent: 5077691 (1991-12-01), Hadad et al.
patent: 5142495 (1992-08-01), Canepa
patent: 5157626 (1992-10-01), Watanabe
patent: 5335198 (1994-08-01), Van Buskirk et al.
patent: 5386388 (1995-01-01), Atwood et al.

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