Flash analog-to-digital converter employing Josephson junctions

Coded data generation or conversion – Analog to or from digital conversion – With particular solid state devices

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341155, H03M 112

Patent

active

054000262

ABSTRACT:
The invention includes an edge-triggered comparator circuit comprising a first Josephson junction connected between a signal input node and an output node and a sampler network coupled to the output node. The first Josephson junction is part of a low inductance SQUID which exhibits a periodic transfer function whose periodicity is a function of the current injected into the SQUID. The sampler network includes a second Josephson junction connected between a sampling terminal and the output node and a third Josephson junction connected between the output node and a point of reference potential. "N" comparator circuits embodying the invention may be interconnected to form an "N"-bit flash analog-to-digital (A/D) converter. The A/D converter may include an R-2R resistive ladder network connected between an analog signal input terminal and a point of reference potential. The resistive ladder network has N nodes with a different comparator being connected to each node. The signal current flowing along the resistive network is divided down by the ladder network such that the current flowing into each succeeding comparator is one-half the current flowing into the preceding comparator. In A/D circuits embodying the invention, there is included an "on chip" step generator circuit responsive to an external sampling signal for producing a sampling step signal having a very short rise time. The sampling step signal is applied to the sampling terminal of all the comparators via circuitry designed to ensure that all the comparators are driven with essentially the same type of step signal.

REFERENCES:
patent: 4977402 (1990-12-01), Ko
patent: 5192951 (1993-03-01), Ko
patent: 5248941 (1993-09-01), Lee et al.

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