Flash analog-to-digital converter

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

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H03M 136

Patent

active

055282423

ABSTRACT:
A two-step flash ADC includes a MSB reference ladder having a first plurality resistors of resistance r and a second plurality of resistors of resistance R, serially connected together on an alternating basis starting and ending with one of the first plurality of resistors. A LSB reference ladder having a total resistance R.sub.L is initially connected across a predetermined (2r+R) leg of the MSB reference ladder. The resistances r, R, and R.sub.L are selected such that the effective resistance resulting from connecting the LSB reference ladder in parallel with a (2r+R) leg of the MSB reference ladder is equal to a (r+R) leg of the MSB reference ladder. In a first step of the two-step flash ADC, MSB reference voltages are picked-off the MSB reference ladder from actual or effective (r+R) legs of the MSB reference ladder, compared against an analog input voltage, and used to generate the most-significant-bits of a digital number corresponding to the analog input voltage. In a second step of the two-step flash ADC, the LSB reference ladder is connected to a portion of the MSB reference ladder determined by the analog input voltage, LSB reference voltages are picked-off the LSB reference ladder from which the least-significant-bits of the digital number corresponding to the analog input voltage is generated. Carryover logic generates the digital number corresponding to the analog input voltage from the most-significant-bits and least-significant-bits thus generated.

REFERENCES:
patent: 4571574 (1986-02-01), Krynicki
patent: 4918449 (1990-04-01), Chin
patent: 5070332 (1991-12-01), Kaller et al.
patent: 5296858 (1994-03-01), Moyal

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