Fixture for burn-in testing of semiconductor wafers, and a semic

Details Fixture for burn-in testing of semiconductor wafers, and a semic Fixture for burn-in testing of semiconductor wafers, and a semic

1992-03-27

1995-06-13

Nguyen, Vinh

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

324765, G01R 3100, G01R 3128

Patent

active

054246512

ABSTRACT:
A semiconductor wafer testing fixture facilitates burn-in testing of multiple wafers, whereby individual wafers have an array of individual die or integrated circuit chips with their own test circuitry. The wafer has Vcc and Vss buses provided thereon which are coupled to the individual integrated circuit chips and test circuitry. The fixture has a housing sized to accommodate multiple semiconductor wafers in a selected orientation. The wafers are supported within the housing on corresponding shelves, which provides a back bias voltage to the wafer. The fixture has first and second conductive arms for supplying selected voltages to the Vcc and Vss buses for imparting test cycling of the integrated circuits. The first arm has multiple hands which engage the Vcc buses on the wafers supported on corresponding shelves. Likewise, the second arm has multiple second hands which engage the Vss buses on the wafers supported on corresponding shelves.

REFERENCES:
patent: 4103232 (1978-07-01), Sugita et al.
patent: 4288911 (1981-09-01), Ports
patent: 4938654 (1990-07-01), Schram
patent: 5003156 (1991-03-01), Kilpatrick et al.
patent: 5279975 (1994-01-01), Devereaux et al.
patent: 5317257 (1994-05-01), Sakai

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