Fixed wireless loop system having dual direct synthesizer

Multiplex communications – Communication techniques for information carried in plural... – Combining or distributing information via time channels

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370342, 375356, H04J 1300, H04J 306

Patent

active

059149612

ABSTRACT:
Disclosed is apparatus including circuitry for providing synchronizing clocks to a transmitter and a receiver of a subscriber unit (SU) that communicates with a radio base unit (RBU) in a synchronous CDMA communication system. The apparatus includes an accumulator for generating a digital signal having a changing magnitude. The accumulator is initialized to a value of a phase command received from the RBU. The apparatus further includes a first circuit having an input coupled to an output of the accumulator for converting a content of the accumulator to a synchronized receiver clock signal, wherein the accumulator content is periodically adjusted to maintain the receiver clock signal in synchronism with a serial bit stream received from the RBU. In accordance with this invention the apparatus further includes a summer circuit having an input coupled to the output of the accumulator for combining the content of the accumulator, representing the commanded receiver side phase difference from RBU timing, with a value of a transmitter timing offset commanded by the RBU. The summer circuit provides a summation signal to a second circuit that converts the summation signal to a synchronized transmitter clock signal. In accordance with this invention problems created by the use of two independent DDSs are avoided by effectively slaving the transmit side DDS to the receive side DDS, thus insuring that the transmit side phase is accurately aligned with the SU phase commanded by the RBU.

REFERENCES:
patent: 4227252 (1980-10-01), Godard
patent: 5828659 (1998-10-01), Teder et al.
patent: 5862132 (1999-01-01), Blanchard et al.

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