Fixed termination scheme for differential receiver that...

Telecommunications – Receiver or analog modulated signal frequency converter – With wave collector

Reexamination Certificate

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C455S281000, C327S108000

Reexamination Certificate

active

06766155

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to transmission line termination techniques for integrated circuits, and more particularly to a novel terminating differential receiver which provides automatic adjustment to compensate for process, voltage, and temperature variations of the integrated circuit.
BACKGROUND OF THE INVENTION
As integrated circuits become increasingly faster, integrated circuit designers are faced signal quality concerns that have previously been relegated to the analog world. At very high speeds, circuit board traces, and in some applications even the packaging interconnects between the die pad and the circuit board trace, behave like transmission lines. Because the transmission of signal occurs using analog technology, the transition between digital states does not occur instantaneously, but instead occurs over a period of time that is dependent on the transmission line characteristics. It is well known that signal transitions over a transmission line will suffer propagation delay due to the parasitic resistance, inductance, and capacitance of the line. Propagation delay increases with the length of the line. In addition, it is also well-known that unless the impedance of the transmission line matches that of the load it drives, the signal will degrade due to reflections caused by impedance mismatching. Reflections occur at all points on the circuit board trace where impedance mismatches exist.
Signal reflections produce or contribute to a number of problems, including false triggering in clock lines, erroneous bits on data, address, and control lines, clock and signal jitter, and an increase in total emissions from the pc board. An effective way to reduce these transmission-line effects is to properly terminate the lines.
Various transmission line termination techniques exist, including parallel, series, Thevenin, AC or diode-based termination. The selected termination technique may vary depending on the application technology.
In prior art termination schemes, the transmission line is terminated external to the integrated circuit—that is, the termination resistors/capacitors are electrically connected to the input/output pads of the integrated circuit on the printed circuit board. External termination is problematic because the actual termination resistors/capacitors may not be positionable within close proximity to the signal's final destination (i.e., the receiver). The redistribution metal required for interconnection between the receiver inside the integrated circuit and the transmission line on the printed circuit board is characterized by its own parasitics which can alter the true termination requirements for the line and contribute to reflection noise.
Another problem faced by bus designers is variation between integrated circuits in manufacturing process, chip temperature, or voltage levels (known as “PVT variation”). PVT variation can cause performance differences across identically designed integrated circuits, and in sensitive applications requires additional compensation circuitry to account for the PVT variation.
In view of the above, a need exists for an improved bus termination technique that also allows for termination impedance adjustment to compensate for PVT variation.
SUMMARY OF THE INVENTION
The present invention is a novel terminating differential receiver that includes automatic adjustment to compensate for PVT variation without requiring additional PVT compensation circuitry.
In accordance with the invention, a terminating differential receiver for an integrated circuit includes a transmission line terminating impedance circuit located within the integrated circuit itself in close proximity to the input of the receiver. By positioning the terminating circuit within the integrated circuit itself, this termination technique significantly reduces signal reflection by accounting for the parasitic capacitance resulting from the internal interconnect between the receiver and the transmission line.
In addition to the improved termination technique, the terminating receiver affords the added benefit of tracking the optimal common-mode performance range to the PVT variations of the chip to shift the DC value of the transmission line in the same direction of the optimal DC operating point of the receiver. Accordingly, the differential receiver automatically adjusts to its optimal performance range without requiring additional PVT compensation circuitry.


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Ethirajan, Karthik; Nemec, John; “Termination techniques for High-Speed Buses”, Feb. 16, 1998, pp. 1-9.
“High Speed Tranceiver Logic (HSTL) A 1.5V OUtput Buffer Supply Voltage Based Interface Standard for Digital Integrated Circuits”, EIA/JEDEC Standard, Aug. 1995, pp. 2-14.

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