Fixed point multiplying apparatus and method using encoded...

Details Fixed point multiplying apparatus and method using encoded... Fixed point multiplying apparatus and method using encoded...

2006-01-31

2006-01-31

Mai, Tan V. (Department: 2193)

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

C708S603000

Reexamination Certificate

active

06993550

ABSTRACT:
The invention relates to a fixed point multiplying apparatus and method using an encoded multiplicand. The multiplicand is encoded into an independent binary system instead of a conventional binary system and each bit value of the encoded multiplicand is used as a control signal about an inputted multiplier in order to effectively execute a fixed point multiplication used in a transform algorithm such as the DCT (Discrete Cosine Transformation) in use for a multimedia codec. The multiplication is executed at a high speed with a simple structure and a small gate number.

REFERENCES:
patent: 4594679 (1986-06-01), George et al.
patent: 6573940 (2003-06-01), Yang
patent: 6584483 (2003-06-01), Altus et al.
patent: 2003/0131037 (2003-07-01), Freidhof

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