Fixed pattern detection apparatus and fixed pattern...

Pulse or digital communications – Spread spectrum – Direct sequence

Reexamination Certificate

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C375S150000

Reexamination Certificate

active

07072384

ABSTRACT:
In a fixed pattern detection apparatus, a reception memory temporarily stores received signals. A correlator calculates signature pattern correlation values for respective blocks by product-sum operation based on received signals of the respective blocks obtained by dividing a received signal at a predetermined reference timing out of the received signals stored in the reception memory. An in-phase adder adds, in phase for a plurality of blocks, the in-phase components and quadrature components of the signature pattern correlation values obtained by the correlator. A power value calculation unit calculates individual power values from in-phase addition values obtained by the in-phase adder. An adder sums up the individual power values obtained by the power value calculation unit to calculate a detection power value corresponding to the received signal. A detection determination unit compares the detection power value obtained by the adder with a threshold to determine whether a fixed pattern has been detected. A fixed pattern detection method is also disclosed.

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patent: 6985517 (2006-01-01), Matsumoto et al.
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patent: WO 00/36761 (2000-06-01), None
patent: WO 00/62436 (2000-10-01), None

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